Nanoimprint Template Pattern Transfer via Localized Resist Control
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Solution Overview
Problem
Nanoimprinting techniques face challenges in forming high-quality patterns due to manufacturing variations among templates and operation variations in imprint apparatuses, leading to defects and abnormal film thicknesses.
Innovation Solution
A pattern forming method that involves dividing chip areas into smaller regions, determining optimum transfer conditions for each area, and using a drop recipe that adjusts resist application based on design data and imprint conditions to ensure precise resist application and separation, thereby minimizing defects and achieving consistent film thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single uniform transfer condition is used for the entire chip area, then the process is simple and fast, but manufacturing variations and apparatus variations cause defects and abnormal film thickness
Solution Approach 1:
The chip area is divided into multiple regions, and the transfer conditions are optimized separately for each region. This segmentation allows the patent to address local variations in manufacturing and apparatus performance, improving overall pattern quality by treating different areas with region-specific parameters rather than a single uniform condition
Solution Approach 2:
The patent applies different transfer conditions to different regions of the chip based on their specific characteristics. By determining optimum transfer conditions for each divided area, the system achieves local optimization that compensates for manufacturing variations and apparatus variations in different parts of the chip
2Manufacturing precision
If the chip area is divided into multiple regions with different transfer conditions, then pattern quality improves, but the process complexity and time increase
Solution Approach 1:
The patent determines the optimum transfer conditions for each divided area in advance, before the actual pattern transfer process. This preliminary determination of region-specific conditions allows for efficient execution during manufacturing, as the optimization work is completed beforehand rather than during production
Solution Approach 2:
The system dynamically adjusts transfer conditions based on the specific characteristics of each region. By making the transfer conditions adaptive and region-dependent rather than static and uniform, the patent achieves better film thickness consistency while managing complexity through systematic region-based control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for the accurate transfer of patterns onto semiconductor substrates, reducing defects and ensuring high-quality pattern formation by accounting for manufacturing and imprint-specific variations, resulting in improved pattern quality and consistency.
Implementation Method 1
a template (mold) is pressed against a pattern forming material (resist) formed on a processing target surface of a wafer
Implementation Method 2
The resultant structure is then irradiated with ultraviolet (UV) light to cure the resist
Data Source
AI summary
According to one embodiment, a pattern forming method comprises transferring a pattern formed in a surface of a template to a plurality of chip areas in a semiconductor substrate under different transfer conditions. Furthermore, the transferring the pattern formed in the surface of the template to the plurality of chip areas in the semiconductor substrate under the different transfer conditions comprises transferring the pattern formed in the surface of the template to the semiconductor substrate at least twice under each identical transfer condition. Moreover, the pattern forming method comprises dividing each of the plurality of chip areas into a plurality of areas, determining an optimum condition for each set of corresponding divided areas in the plurality of chip areas, and transferring the pattern onto the semiconductor substrate using the optimum transfer condition determined for each divided area.