Nanopore Cell Circuit Design for High-Density Sequencing
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Solution Overview
Problem
Nanopore-based sequencing chips face challenges with measurement inaccuracies due to operational amplifier offset and noise, and scaling issues arise from area-intensive circuitry, limiting the number of cells that can be effectively integrated in a small form factor.
Innovation Solution
The solution involves eliminating the operational amplifier and on-chip capacitor by allowing the voltage across the nanopore to decay over time, utilizing the capacitance associated with the membrane and working electrode to achieve bidirectional measurements and reduce chip size, while optimizing the ratio of membrane and electrochemical capacitance for improved system performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If operational amplifier and on-chip capacitor are used in nanopore-based sequencing chips, then measurement precision is improved, but device complexity and area increase
Solution Approach 1:
The patent removes the operational amplifier and on-chip capacitor from the circuit design. Instead of using active components that consume area and generate offset/noise, the invention uses passive elements (resistors, capacitors) that can be implemented with standard CMOS processes, thereby reducing device complexity while maintaining measurement capability through alternative circuit topologies
Solution Approach 2:
The patent employs disposable or single-use components in the measurement circuit, replacing expensive and complex operational amplifiers with simpler, lower-cost passive components. This approach reduces the overall device complexity and area while achieving sufficient measurement precision for the application
2Measurement precision
If operational amplifier and on-chip capacitor are used in nanopore-based sequencing chips, then measurement precision is improved, but area increases
Solution Approach 1:
The patent removes the operational amplifier and on-chip capacitor from the circuit design. These components occupy significant area on the chip, and their removal allows for a more compact device layout while maintaining measurement functionality through simplified passive circuit topologies
Solution Approach 2:
The patent replaces area-intensive operational amplifiers with compact passive components. This substitution dramatically reduces the area required for the measurement circuit, enabling higher cell density in the sequencing chip while preserving measurement precision
3Productivity
If more cells are integrated in small form factor, then productivity is improved, but measurement precision deteriorates due to offset and noise
Solution Approach 1:
The patent removes the operational amplifier and on-chip capacitor that generate offset and noise. This extraction of problematic components enables the integration of more cells in a small form factor while maintaining measurement precision, as the simplified passive circuit topology introduces minimal interference and noise
Solution Approach 2:
The patent uses simple passive components that introduce minimal noise and offset compared to active operational amplifiers. This allows for higher cell density in the sequencing chip, improving productivity while maintaining measurement precision through the use of low-interference passive circuit elements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces measurement inaccuracies, minimizes footprint, and enables the scaling of nanopore-based sequencing chips to include millions of cells, facilitating more robust, efficient, and cost-effective DNA sequencing.
Implementation Method 1
utilizing the capacitance associated with the membrane and working electrode to achieve bidirectional measurements
Data Source
AI summary
A nanopore cell is disclosed. The nanopore cell includes an electrolyte well having a bottom base, a surrounding sidewall, and a hydrophobic surface above the surrounding sidewall. The nanopore cell further includes a first layer of electrode material disposed on the bottom base of the electrolyte well. The nanopore cell further includes a second layer of electrode material disposed on the surrounding sidewall of the electrolyte well and electrically connected to the first layer of electrode material. The first layer of electrode material and the second layer of electrode material are configured to jointly provide capacitive coupling when an electrolyte is placed in the electrolyte well.