Nanoscale FET Array Front-Gated Sensing

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Solution Overview

Problem

Back-gated silicon nanowire FET sensors face limitations in sensitivity due to thick buried oxide acting as the gate dielectric and formation of the inversion layer away from the sensing surface, leading to sub-threshold slope issues and fragile nanowire structures, which hinder effective biomolecule detection.

Innovation Solution

An electrochemical sensor array is developed with a thermal oxide layer of 2-3 nm thickness, bonded with a modified silicon substrate, where the contact and wiring structure are positioned opposite to the sensing surface, allowing for dense packing and improved sensitivity by reducing the silicon nanowire thickness without compromising the sensing area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If thick buried oxide is used as gate dielectric in back-gated silicon nanowire FET sensors, then structural support is improved, but sensitivity deteriorates due to inversion layer formation away from sensing surface

Engineering Contradiction:

Improvestructural supportVSAvoidsensitivity

Core Design Contradiction:

StrengthVSMeasurement precision

Solution Approach 1:

The patent inverts the conventional back-gated configuration by placing the gate electrode on the same side as the sensing surface (front-gated configuration). This allows the thin oxide layer (2-3 nm) to serve as the gate dielectric while maintaining structural support through the substrate, eliminating the inversion layer formation issue that occurs with thick buried oxide in back-gated devices.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent changes the oxide thickness parameter from thick (conventional back-gated) to thin (2-3 nm thermal oxide), and simultaneously changes the gating configuration from back-gated to front-gated. This parameter change enables the inversion layer to form at the sensing surface rather than away from it, improving sensitivity while maintaining structural integrity through the substrate.

Inventive Principle:

Principle #35Parameter changes

2Measurement precision

If silicon nanowire thickness is reduced to improve sensitivity, then detection capability is improved, but structural fragility increases

Engineering Contradiction:

Improvedetection capabilityVSAvoidstructural integrity

Core Design Contradiction:

Measurement precisionVSStrength

Solution Approach 1:

By inverting to a front-gated configuration, the patent allows the use of very thin oxide (2-3 nm) as the gate dielectric, which enables reduced nanowire thickness for improved sensitivity while the substrate provides structural support. The thin oxide layer is sufficient for gating control when positioned in the front-gated configuration, eliminating the need for thick buried oxide that would constrain nanowire thickness.

Inventive Principle:

Principle #13The other way round (Inversion)

3Device complexity

If contact and wiring structures are positioned on the same side as sensing surface, then device layout is simplified, but sensor array density deteriorates

Engineering Contradiction:

Improvelayout simplicityVSAvoidsensor array density

Core Design Contradiction:

Device complexityVSQuantity of substance

Solution Approach 1:

The patent moves the contact and wiring structures to the opposite side of the substrate from the sensing surface, utilizing the third dimension (substrate thickness) to separate functional elements. This allows dense packing of sensors on the sensing surface while contacts and wiring are routed through vias on the opposite side, significantly increasing array density without complicating the sensing surface layout.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances the sensitivity and density of the sensor array, enabling precise nanoscale detection of ionic biomolecules and spatial mapping of membrane protein activity, while maintaining structural integrity and reducing sensor-to-sensor variations.

Implementation Method 1

A thermal oxide layer is provided, a thickness of 2 to 3 nm. The transistor device layer is provided on top of the thermal oxide layer

Methodology Applied

Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

The plurality of FETs is configured to selectively sense concentrations of ionic biomolecules at a nanoscale granularity

Methodology Applied

Scientific EffectField effect transistor sensing: Electric Field

Data Source

PatentUS11448614B2Nanoscale granularity field effect transistor array

Publication Date: 2022.09.20 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

An electrochemical sensor array includes a thermal oxide configured to interface with one or more analytes. There is a transistor device layer that includes a plurality of field effect transistors (FETs) on top of the thermal oxide. A contact and wiring structure layer is on top of the transistor device layer and operative to couple to control nodes of each of the plurality of FETs. The contact and wiring structure are on a side opposite to that of the thermal oxide.