Nanoscale Logic Circuitry via Programmable Crosspoints

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Solution Overview

Problem

The challenge lies in implementing practical and efficient logic circuits using nanoscale electronic structures, particularly in achieving high-density data storage and logic operations within integrated circuits, as conventional photolithography techniques approach physical limits in feature size reduction.

Innovation Solution

A hybrid nanoscale/microscale device architecture that utilizes a two-dimensional array of programmable crosspoints in the nanoscale layer for data storage and logic operations, interfacing with a microscale layer for control and timing, allowing for dense nanoscale structures and persistent, non-volatile data storage while leveraging well-known microscale circuitry for logic operation execution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional photolithography techniques are used to decrease feature sizes, then manufacturing precision is improved, but the feature size reduction approaches fundamental physical limits

Engineering Contradiction:
Improvefeature size reductionVSAvoidfurther decreases in feature sizes
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent introduces nanowire crossbars as an intermediary technology between conventional photolithography and the desired ultra-fine features. These nanowire structures serve as a mediating platform that enables programming and logic operations at nanoscale dimensions (10nm or smaller) without being constrained by the physical limits of traditional photolithographic methods

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent transitions from planar photolithographic fabrication to three-dimensional nanowire crossbar structures. By stacking multiple layers of nanowires perpendicular to each other, the system achieves high-density programmable crosspoints in the vertical dimension, bypassing the two-dimensional constraints of conventional photolithography

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If nanoscale structures are used for data storage, then data storage density is improved, but implementing logic circuits becomes challenging

Engineering Contradiction:
Improvedata storage densityVSAvoidlogic circuit implementation
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent makes programmable crosspoints universal elements that can simultaneously perform multiple functions: data storage, data movement, and logic operations. By programming the resistance states of crosspoints, the same nanoscale structure can function as memory cells, switches, or logic gates depending on the applied voltage patterns, eliminating the need for separate logic circuitry

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges previously separate functions (storage and logic) into a unified nanoscale programmable crosspoint array. The crosspoints can be configured to perform both data retention and computational operations, combining the roles of memory and processor into a single integrated structure

Inventive Principle:
Principle #5Merging (Combining)

3Quantity of substance

If nanowire crossbars with multiple layers are used, then programmable crosspoint density is improved, but fabrication complexity increases

Engineering Contradiction:
Improveprogrammable crosspoint densityVSAvoidnanowire crossbar fabrication
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent resolves fabrication complexity by moving to vertical stacking of nanowire layers. Instead of increasing horizontal density within a single layer, multiple layers are stacked perpendicular to each other, achieving high crosspoint density through the third dimension while maintaining simpler two-dimensional fabrication processes for each individual layer

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8390323B2Dense nanoscale logic circuitry
Publication Date: 2013.03.05 HEWLETT PACKARD ENTERPRISE DEV LP
  • US8390323B2 patent drawing
  • US8390323B2 patent drawing
  • US8390323B2 patent drawing

AI summary

One embodiment of the present invention is directed to hybrid-nanoscale/microscale device comprising a microscale layer that includes microscale and/or submicroscale circuit components and that provides an array of microscale or submicroscale pins across an interface surface; and at least two nanoscale-layer sub-layers within a nanoscale layer that interfaces to the microscale layer, each nanoscale-layer sub-layer containing regularly spaced, parallel nanowires, each nanowire of the at least two nanoscale-layer sub-layers in electrical contact with at most one pin provided by the microscale layer, the parallel nanowires of successive nanoscale-layer sub-layers having different directions, with the nanowires of successive nanoscale-layer sub-layers intersecting to form programmable crosspoints.