Nanosecond Pulser Circuit With Pulse Compression for Fast High Voltage
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Solution Overview
Problem
Current nanosecond pulsers face challenges in producing high-voltage electrical pulses with rapid rise times and variable pulse widths, as they often suffer from high stray inductance and capacitance, limiting their ability to achieve peak voltages greater than 1 kilovolt with rise times less than 150 nanoseconds.
Innovation Solution
The design incorporates a nanosecond pulser with multiple switch circuits, a transformer core configuration that includes primary and secondary windings, and a pulse compression circuit comprising a saturable inductor and capacitor, which reduces stray inductance and capacitance, allowing for the generation of high-voltage pulses with rise times less than 50 nanoseconds and variable pulse widths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional nanosecond pulser designs are used, then the device structure is simple, but the rise time is too long (greater than 150 nanoseconds) and peak voltage is insufficient (less than 1 kilovolt)
Solution Approach 1:
The pulser is divided into multiple independent switch circuits (first switch circuit, second switch circuit, etc.), each controlling a portion of the primary winding. This segmentation allows parallel operation of multiple switches to achieve faster effective switching and reduced rise time while maintaining manageable individual circuit complexity
Solution Approach 2:
The patent transitions from a single-switch design to a multi-switch parallel architecture, adding temporal dimension through sequential or simultaneous switching of multiple circuits. This dimensional expansion enables the system to achieve sub-50 nanosecond rise times by combining the switching actions of multiple circuits rather than relying on a single slow switch
2Manufacturing precision
If high peak voltage (greater than 1 kilovolt) and fast rise time (less than 50 nanoseconds) are achieved, then the pulser performance is improved, but stray inductance and capacitance increase
Solution Approach 1:
The patent optimizes critical parameters including reducing stray inductance to less than 50 nH and stray capacitance to less than 50 pF through careful circuit layout and component selection. The pulse width is precisely controlled by adjusting the pulse generation circuit timing parameters, enabling variable pulse widths with high precision while maintaining low stray elements
Solution Approach 2:
A pulse compression circuit is introduced as an intermediary stage between the transformer and the output. This circuit actively compresses the pulse waveform to achieve the desired rise time and pulse width precision while isolating the effects of stray inductance and capacitance, thereby improving pulse quality without being directly affected by parasitic elements
3Adaptability or versatility
If variable pulse width and high pulse repetition frequency (exceeding 1 MHz) are implemented, then the pulser versatility is improved, but the device complexity increases
Solution Approach 1:
The pulse width is made dynamically variable through a controllable pulse generation circuit that can adjust the duration of each pulse independently. Multiple switch circuits can be activated in different sequences and durations, providing dynamic control over pulse width without requiring physical reconfiguration of the circuit, thus achieving versatility with manageable complexity
Solution Approach 2:
The multi-switch circuit architecture serves multiple functions simultaneously: it enables variable pulse width control, achieves high pulse repetition frequencies exceeding 1 MHz, and maintains low stray inductance and capacitance. The same switch circuits that provide pulse width variability also enable high repetition rates by allowing rapid reset and re-triggering, consolidating multiple capabilities into a single unified structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces rise times by up to 20 times, enabling the production of high-voltage pulses with peak voltages greater than 1 kilovolt and pulse repetition frequencies exceeding 1 MHz, while minimizing stray inductance and capacitance, thus overcoming the limitations of existing nanosecond pulser technologies.
Implementation Method 1
a transformer, and an output. In some embodiments, the transformer may include a first transformer core, a first primary winding that is wound at least partially around a portion of the first transformer core, and a secondary winding wound at least partially around a portion of the first transformer core
Implementation Method 2
The pulse compression circuit may include at least a saturable inductor arranged in series with the output of the secondary winding
Data Source
AI summary
A nanosecond pulser is disclosed. In some embodiments, the nanosecond pulser may include one or more switch circuits including one or more solid state switches, a transformer, and an output. In some embodiments, the transformer may include a first transformer core, a first primary winding wound at least partially around a portion of the first transformer core, and a secondary winding wound at least partially around a portion of the first transformer core. In some embodiments, each of the one or more switch circuits are coupled with at least a portion of the first primary winding. In some embodiments, the output may be electrically coupled with the secondary winding and outputs electrical pulses having a peak voltage greater than about 1 kilovolt and a rise time of less than 150 nanoseconds or less than 50 nanoseconds.