Nanosheet Transistor Active Cut Structure for Reliable Fabrication
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Solution Overview
Problem
Existing semiconductor devices face challenges in process complexity and reliability of active cuts, particularly in multi-gate transistors with nanosheet structures, which affect the scalability and performance of integrated circuits.
Innovation Solution
The semiconductor device incorporates an active cut that penetrates a capping layer and extends into nanosheets, with a design that includes a lower interlayer insulating layer, active patterns, gate electrodes, and gate spacers, reducing process difficulty and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an active cut is formed from the lower part of an active pattern, then process difficulty is reduced, but the reliability of the active cut may be compromised if it does not penetrate the capping layer
Solution Approach 1:
The active cut is formed to penetrate the capping layer in advance, establishing a reliable structure before subsequent processing steps. This preliminary penetration ensures that the active cut maintains its integrity throughout the fabrication process, preventing reliability issues that would arise from incomplete cuts.
Solution Approach 2:
Instead of forming the active cut from the top surface, the cut is formed from the lower part of the active pattern and extended upward to penetrate the capping layer. This inverted approach simplifies the manufacturing process by avoiding complex top-down etching while still achieving the required reliability through full penetration.
2Reliability
If multi-gate transistors with nanosheet structures are used to improve current control and suppress short channel effects, then device performance is improved, but process complexity increases
Solution Approach 1:
The channel region is segmented into multiple nanosheets stacked vertically, with each nanosheet controlled by its own gate electrode. This segmentation enables superior current control and short channel effect suppression while the active cut structure simplifies the overall fabrication process by providing a straightforward method to create the multi-layer nanosheet architecture.
Solution Approach 2:
The transistor structure transitions from a two-dimensional planar channel to a three-dimensional stacked nanosheet channel. The active cut extends vertically through the capping layer to access and define the nanosheets in the vertical dimension, enabling improved device performance while maintaining manageable process complexity through a systematic vertical fabrication approach.
Data Source
AI summary
A semiconductor device includes a lower interlayer insulating layer and an active pattern thereon, wherein the active pattern extends in a first horizontal direction and is spaced apart from an upper surface of the lower interlayer insulating layer in a vertical direction; first nanosheets on the active pattern; second nanosheets spaced apart from the first nanosheets in the first horizontal direction on the active pattern; a first gate electrode extending in a second horizontal direction and extending around the first plurality of nanosheets; a capping layer on the first gate electrode; and an active cut on the lower interlayer insulating layer, wherein the active cut is spaced apart from the first gate electrode in the first horizontal direction, and an uppermost surface of the active cut is farther than an upper surface of the capping layer from the upper surface of the lower interlayer insulating layer.