Stack Nanosheet Backside Contact Through Gate Cut to Prevent Shorting
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Solution Overview
Problem
Nanosheet technology faces challenges in scaling down due to interference between devices, and the formation of backside contacts is complicated by the placement of backside/buried power rails.
Innovation Solution
A microelectronic structure with a unique backside connection that extends through a gate cut, avoiding multiple backside/buried power rails, and connects to the lower stack of stacked FET devices, with a non-uniform backside surface to prevent shorting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If backside contacts are formed in conventional nanosheet devices, then device functionality is achieved, but device interference occurs when devices are scaled down and placed closer together
Solution Approach 1:
The backside contact extends through the gate cut in the lateral dimension, allowing the contact to reach the lower stack from the backside without interfering with adjacent devices in the vertical stacking direction. This dimensional approach separates the contact path from the interfering region.
Solution Approach 2:
The backside contact is segmented into multiple portions: a first portion extending through the gate cut, a second portion connecting to the lower stack, and a non-uniform third portion that navigates around power rails. This segmentation allows each portion to fulfill a specific function while avoiding interference.
2Reliability
If backside contacts extend through gate cuts, then connection to lower stack is achieved, but shorting across multiple metal lines/power rails may occur
Solution Approach 1:
The backside contact features a non-uniform third portion with varying cross-sectional area along its length. The cross-sectional area is reduced in regions closer to power rails and increased in regions farther from power rails, creating local quality variations that prevent shorting while maintaining connection reliability.
Solution Approach 2:
The non-uniform geometry of the backside contact is designed in advance to counteract the potential harmful effect of shorting. By pre-shaping the contact with smaller cross-sections near power rails, the design proactively prevents shorting before it can occur.
3Ease of manufacture
If uniform backside contacts are used, then manufacturing simplicity is maintained, but shorting cannot be prevented across power rails
Solution Approach 1:
The backside contact employs parameter changes in its cross-sectional area along its length. The contact transitions from a uniform geometry to a non-uniform geometry where the cross-sectional area varies to prevent shorting. This can be achieved through controlled etching or deposition processes that create the gradient profile.
Data Source
AI summary
A microelectronic structure includes a first row of stack nano devices that includes a plurality of a first stacked nano FET devices and a second row of stack nano devices that includes a plurality of a second stacked nano FET devices. Each of the plurality of first nano stacked FET devices and each of the plurality of second stacked FET devices includes an upper stack transistor and a lower stack transistor. A gate cut located between the first row of stacked nano devices and the second row stacked nano devices. An interconnect located within gate cut. The interconnect is connected to a source/drain of one of the lower stacked transistors and the interconnect includes a non-uniform backside surface.