Nanosheet Transistor Backside Contacts for Self-Aligned Isolation

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Solution Overview

Problem

As nanosheet technology scales down, forming properly aligned contacts between increasingly dense devices becomes challenging due to interference and alignment issues, making it difficult to create necessary contacts effectively.

Innovation Solution

A microelectronic device with a nanosheet transistor featuring a first source/drain and a second source/drain, where a frontside contact is connected to the first source/drain and a backside contact is connected to the second source/drain, with a plurality of isolation layers beneath the nanosheet transistor, allowing the second source/drain to extend through these layers to connect with the backside contact. This is achieved by forming backside contact placeholders and alternating layers on separate substrates, flipping and bonding them, and then etching and processing to create aligned source/drain regions and contacts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If nanosheet technology is scaled down to increase device density, then the number of devices per area increases, but alignment precision and contact formation become more difficult due to interference between closely spaced devices

Engineering Contradiction:
Improvedevice densityVSAvoidcontact alignment precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent introduces a vertical dimension by forming backside contacts that extend through isolation layers from the rear surface of the substrate. This third-dimensional approach to contact formation allows contacts to be established without relying solely on planar alignment in the traditional front-side contact geometry, thereby resolving the alignment precision problem while maintaining high device density

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The methodology performs preliminary actions by forming backside contact placeholders and isolation layers before final device assembly and contact formation. The placeholders are positioned in advance on the backside of the substrate, and isolation layers are prepared beforehand, enabling self-aligned contact formation that eliminates alignment issues during final device integration

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If devices are placed closer together to increase integration density, then area utilization improves, but interference between adjacent devices increases making contact formation more difficult

Engineering Contradiction:
Improvearea utilizationVSAvoiddevice interference
Core Design Contradiction:
Area of stationary objectVSObject-generated harmful factors

Solution Approach 1:

The patent segments the contact formation process into distinct front-side and back-side operations. By dividing the contact formation into separate stages with placeholders positioned on the backside, the methodology eliminates interference between adjacent devices during contact formation, as each device's backside contact placeholders are formed independently before final assembly

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The backside contact placeholders serve as intermediary structures that mediate between the isolation layers and the final contact formation. These placeholders are formed in advance on the backside of the substrate and guide the subsequent formation of source/drain contacts, eliminating direct interference between adjacent devices while enabling high-density integration

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240421035A1Transistors with bottom dielectric isolation and fully self-aligned direct backside contact
Publication Date: 2024.12.19 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240421035A1 patent drawing
  • US20240421035A1 patent drawing
  • US20240421035A1 patent drawing

AI summary

A microelectronic device including a nanosheet transistor that includes a first source/drain and a second source/drain. A frontside contact connected to the first source/drain and a backside contact connected to the second source/drain. A plurality of isolation layers located beneath the nanosheet transistor, and the second source/drain extends through the plurality of isolation layers to connect with the backside contact.