Nanosheet CMOS Dual Work Function Metal Layers
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Solution Overview
Problem
Current semiconductor technologies face challenges in forming dual channel structures with multiple threshold voltages, particularly in nanosheet CMOS devices, due to the complexity of additional patterning required by dipole methods and the resulting reduction in mobility.
Innovation Solution
The method involves depositing and patterning dual work function metal layers around nanosheet channels in CMOS structures to create multiple threshold voltages without using dipole materials like lanthanum oxide, simplifying fabrication and enhancing performance by reducing doping and patterning steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If dipole methods are used to form dual channel structures with multiple threshold voltages, then multiple threshold voltages can be achieved, but device complexity and fabrication complexity increase due to additional patterning steps
Solution Approach 1:
The gate structure is segmented into multiple independent work function metal layers (first work function metal layer and second work function metal layer) that can be independently patterned and controlled. This segmentation allows different regions of the gate to have different work functions, enabling multiple threshold voltages in dual channel CMOS structures without requiring complex dipole materials or additional patterning steps beyond the metal layer deposition and patterning process
Solution Approach 2:
Different work function metal layers are applied to different regions of the gate structure corresponding to different channel types (nFET and pFET). The first work function metal layer is deposited surrounding nanosheet channels in both first CMOS structure and second CMOS structure, then selectively patterned, and the second work function metal layer is deposited to surround specific nanosheet channels. This local differentiation of work function properties enables precise control of threshold voltages in different channel regions
2Adaptability or versatility
If dipole materials like lanthanum oxide are used to create multiple threshold voltages, then multiple threshold voltages can be achieved, but mobility is reduced
Solution Approach 1:
The invention extracts and eliminates the need for dipole materials (such as lanthanum oxide) from the gate structure by using multiple work function metal layers instead. This removal of harmful dipole materials prevents the associated mobility reduction while still achieving the desired multiple threshold voltages through controlled deposition and patterning of metal layers with different work functions
Solution Approach 2:
The work function of the gate is adjusted by changing the material composition and thickness of the metal layers. By depositing first and second work function metal layers with different materials and controlling their thicknesses, the effective work function in different regions can be tuned to achieve desired threshold voltages without compromising channel mobility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables increased performance and simplified fabrication of nanosheet CMOS devices with multiple threshold voltages, avoiding the mobility reduction issues associated with dipole methods, and achieving uniform threshold voltages across channels.
Implementation Method 1
depositing a first work function metal layer surrounding nanosheet channels in nanosheet channel stacks
Data Source
AI summary
A method of forming a semiconductor structure includes depositing a first work function metal layer in nanosheet channel stacks for first and second CMOS structure each including a first nanosheet channel stack for an nFET and a second nanosheet channel stack for a pFET. The method also includes patterning to remove the first work function metal layer surrounding nanosheet channels in the first nanosheet channel stack of the first CMOS structure and nanosheet channels in the second nanosheet channel stack of the second CMOS structure. The method further includes depositing a second work function metal layer to surround the nanosheet channels in the first nanosheet channel stack of the first CMOS structure and the nanosheet channels in the second nanosheet channel stack of the second CMOS structure. The first CMOS structure has a first threshold voltage and the second CMOS structure has a second threshold voltage.