Nanosheet Transistor Contact Separation for Reliable Source/Drain Links

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Solution Overview

Problem

Existing semiconductor devices face challenges in ensuring the reliability of the source/drain region connections, particularly in multi-gate transistors with complex three-dimensional structures, where the scaling and current control capabilities are compromised.

Innovation Solution

The semiconductor device incorporates a contact separating layer on the upper surface of the source/drain region, utilizing different materials for the contact separating layers and insulating layers to enhance electrical connectivity and reliability, with specific configurations for upper and lower source/drain contacts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a multi-gate transistor with three-dimensional channel is used to improve current control capability and suppress short channel effect, then device performance is improved, but reliability of source/drain region connections deteriorates due to complex structure

Engineering Contradiction:
Improvesource/drain region connection reliabilityVSAvoidthree-dimensional structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the source/drain region into multiple segments by introducing contact separating layers that split the source/drain region into distinct contact areas. This segmentation allows separate upper and lower source/drain contacts to be formed, improving connection reliability while managing the complexity of the three-dimensional structure through systematic division of the contact region.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The contact separating layer acts as an intermediary element between the source/drain region and the contacts. This intermediate layer facilitates reliable electrical connection by providing a dedicated interface that manages the complex three-dimensional geometry, allowing both upper and lower contacts to connect properly to the source/drain region without direct complex interfacing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If contact separating layer with different material is introduced to improve electrical connectivity, then connection reliability is improved, but device structure becomes more complex

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidlayer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by introducing contact separating layers with specific materials (different from the interlayer insulating layer material) only in the contact regions where electrical connectivity is needed. This localized material differentiation improves electrical connection reliability at critical interfaces without requiring complex material variations throughout the entire device structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs composite material structures by combining the contact separating layer material with the interlayer insulating layer material. This composite approach creates distinct functional regions with optimized properties for both electrical connection and insulation, improving reliability while managing overall device complexity through purposeful material combination.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20250318202A1Semiconductor device
Publication Date: 2025.10.09 SAMSUNG ELECTRONICS CO LTD
  • US20250318202A1 patent drawing
  • US20250318202A1 patent drawing
  • US20250318202A1 patent drawing

AI summary

A semiconductor device includes first and second insulating patterns extended in a first horizontal direction on a lower interlayer insulating layer, first and second plurality of nanosheets stacked on the first and second insulating patterns, a field insulating layer surrounding the first and second insulating patterns, a gate electrode on the first and second insulating patterns, first and second source/drain regions on one side of the gate electrode on the first and second insulating patterns, respectively, a first contact separating layer inside the upper interlayer insulating layer between the first and second source/drain regions, a second contact separating layer inside the upper interlayer insulating layer on the second source/drain region and contacting the first contact separating layer, and an upper source/drain contact electrically connected to the first source/drain region through the upper interlayer insulating layer in the vertical direction and contacting a sidewall of the first contact separating layer.