Semiconductor Nanosheet Structures With Dielectric Leakage Blocking
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Solution Overview
Problem
As semiconductor devices are scaled down, off-state current leakage in the substrate of multi-gate field effect transistors becomes a significant concern, necessitating further improvements to enhance device performance and reduce manufacturing costs.
Innovation Solution
A semiconductor device structure is developed with nanosheet channels surrounded by a gate electrode, incorporating ion implantation and oxidation processes to form dielectric regions at the source/drain regions, effectively blocking current leakage through the substrate by transforming implanted regions into dielectric materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistor dimensions are scaled down to increase functional density, then production efficiency and cost are improved, but off-state current leakage in the substrate increases
Solution Approach 1:
The substrate is segmented into multiple regions with different properties: a first region with higher doping concentration and a second region with lower doping concentration. This segmentation allows the high-doping first region to block off-state current leakage while the low-doping second region maintains transistor performance, thus resolving the contradiction between scaling down for productivity and preventing harmful current leakage.
Solution Approach 2:
Different regions of the substrate are assigned different doping concentrations to fulfill different functions. The first region has a first doping concentration optimized for blocking off-state current, while the second region has a second doping concentration optimized for transistor operation. This local quality differentiation enables the substrate to simultaneously achieve low leakage and high productivity at scaled dimensions.
2Ease of manufacture
If transistor dimensions are scaled down to increase functional density, then manufacturing cost is reduced, but device performance deteriorates due to increased current leakage
Solution Approach 1:
The substrate is divided into functionally distinct regions with different doping concentrations. The first region with higher doping provides reliable current blocking, while the second region with lower doping maintains transistor performance. This segmentation enables scaled-down transistors to be manufactured cost-effectively without sacrificing device reliability.
Solution Approach 2:
The doping concentration parameter is varied across different regions of the substrate. By changing the doping concentration from a first value in the first region to a second value in the second region, the invention optimizes both current blocking capability and transistor performance, thereby maintaining device reliability at scaled dimensions while reducing manufacturing cost.
3Object-generated harmful factors
If ion implantation is performed to block current leakage, then off-state current is reduced, but manufacturing process complexity increases
Solution Approach 1:
Ion implantation is performed as a preliminary action to create the doped regions in the substrate before transistor fabrication. By pre-establishing the first and second regions with different doping concentrations through ion implantation, the subsequent transistor manufacturing process is simplified, and off-state current leakage is effectively blocked without significantly increasing overall process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly reduces off-state current leakage, enhancing device performance while maintaining cost-effectiveness by controlling current flow through the substrate, thus improving overall device efficiency.
Implementation Method 1
performing an implantation process to implant dopants into the conformal layer and a surface portion of the substrate
Implementation Method 2
oxidizing the conformal layer and the surface portion of the substrate
Data Source
AI summary
A method for forming a semiconductor device structure is provided. The method includes forming a fin structure from a substrate, the fin structure comprises a plurality of first semiconductor layers and a plurality of second semiconductor layers alternatingly stacked. The method also includes forming a sacrificial gate structure over a portion of the fin structure, removing portions of the fin structure not covered by the sacrificial gate structure, forming a conformal layer on exposed surfaces of the sacrificial gate structure, the first semiconductor layers, and the substrate. The method also includes converting portions of the conformal layer and a surface portion of the substate into dielectric regions, forming a source/drain feature on opposite sides of the sacrificial gate structure, the source/drain feature being in contact with the dielectric regions and the first semiconductor layers of the fin structure. The method further includes removing the sacrificial gate structure and the second semiconductor layers.