Nanosheet eDRAM Integration via Epitaxial Strap and Cut Mask
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Solution Overview
Problem
There is a need to integrate an embedded dynamic random access memory (eDRAM) cell with a nanosheet device while avoiding eDRAM to eDRAM shorts, which is a challenge in the development of non-planar semiconductor devices for advanced technology nodes like 5 nm and beyond.
Innovation Solution
A semiconductor structure is formed with a nanosheet device and an eDRAM cell connected by a doped polycrystalline semiconductor material, where the eDRAM cell is located in a trench of a semiconductor-on-insulator (SOI) substrate, and a doped polycrystalline semiconductor strap connects the eDRAM cell to the nanosheet device's source/drain regions, using an eDRAM cut mask to remove unwanted semiconductor material and prevent shorts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If eDRAM cell is integrated with nanosheet device in close proximity, then space utilization is improved, but risk of eDRAM to eDRAM shorts increases
Solution Approach 1:
The patent extracts and removes unwanted polycrystalline semiconductor material from regions between the eDRAM cell and nanosheet device using an eDRAM cut mask. This selective removal creates sufficient spacing to prevent eDRAM to eDRAM shorts while maintaining close proximity for space-efficient integration. The cut mask process specifically targets and removes material that would otherwise create conductive paths between adjacent eDRAM cells.
Solution Approach 2:
The patent applies different material properties and processing to different regions: the eDRAM cell region receives selective material removal via cut mask, while the nanosheet device region maintains its full structure. The strap region uses doped polycrystalline semiconductor material with specific electrical properties. This localized differentiation allows close integration while preventing shorts through region-specific optimization.
2Reliability
If doped polycrystalline semiconductor strap is formed during epitaxial growth, then low-resistance connection is achieved, but manufacturing complexity increases
Solution Approach 1:
The patent merges the strap formation process with the epitaxial growth of doped single crystalline semiconductor source/drain regions of the nanosheet device. Both the doped polycrystalline semiconductor strap and the doped single crystalline source/drain regions are formed simultaneously in a single epitaxial growth step, eliminating the need for separate strap formation processing and reducing overall manufacturing complexity.
Solution Approach 2:
The epitaxial growth process serves multiple functions: it forms the doped single crystalline semiconductor source/drain regions for the nanosheet device, creates the doped polycrystalline semiconductor strap for low-resistance connection, and establishes the physical contact between the eDRAM cell and nanosheet device. This multi-functional approach simplifies the overall manufacturing process.
3Reliability
If eDRAM cut mask is used to remove unwanted material, then short prevention is improved, but manufacturing steps increase
Solution Approach 1:
The eDRAM cut mask is formed and applied before the epitaxial growth step. This preliminary action ensures that unwanted polycrystalline semiconductor material is already in place to be selectively removed during or after epitaxial growth, allowing the cut mask to serve its short-prevention function while integrating smoothly into the overall manufacturing sequence.
4Productivity
If nanosheet device is formed laterally adjacent to eDRAM cell, then integration density is improved, but manufacturing precision requirements increase
Solution Approach 1:
The epitaxial growth process self-aligns the doped polycrystalline semiconductor strap with the eDRAM cell and nanosheet device based on the physical proximity and existing material structures. The growth occurs naturally from the exposed surfaces and interfaces, eliminating the need for complex alignment steps and reducing manufacturing precision requirements while maintaining high integration density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables space-saving design with reduced lateral overgrowth and low-resistance strap formation, effectively eliminating eDRAM to eDRAM shorts and allowing for larger strap sizes, enhancing the integration of eDRAM cells with nanosheet devices.
Implementation Method 1
doped single crystalline semiconductor material is formed on a physically exposed surface of the topmost semiconductor layer of the SOI substrate and sidewalls of each semiconductor channel material nanosheet
Implementation Method 2
simultaneously forming a doped polycrystalline semiconductor material from the physically exposed polycrystalline semiconductor material electrode of the eDRAM cell
Data Source
AI summary
A semiconductor structure is provided in which a nanosheet device is formed laterally adjacent, but in proximity to, an embedded dynamic random access memory (eDRAM) cell. The eDRAM cell and the nanosheet device are connected by a doped polycrystalline semiconductor material that is formed during the epitaxial growth of doped single crystalline semiconductor source/drain regions of the nanosheet device. An eDRAM cut mask is used to remove unwanted semiconductor material from regions not including the eDRAM cell and the nanosheet device.