Nanosheet FET Source-Drain Epitaxy Replacement After Channel Release
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Solution Overview
Problem
Current manufacturing processes for nanosheet FETs damage the source drain epitaxy during the etching of sacrificial layers, leading to structural and electrical integrity loss, and prevent desirable stress on nanosheet channel layers due to lateral growth issues without proper nucleation sites.
Innovation Solution
A semiconductor structure and method involving a nanosheet FET with source drain epitaxy replacement, where a u-shaped third source drain epitaxy made of pure germanium or silicon germanium is grown on top of the remaining second source drain epitaxy, providing desirable stress and improving performance by avoiding damage from sacrificial layer etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If sacrificial layers are etched to release nanosheet channel layers, then nanosheet FET structure is formed, but source drain epitaxy is damaged leading to structural and electrical integrity loss
Solution Approach 1:
The source drain epitaxy is divided into multiple segments: a first source drain epitaxy formed initially, and a second source drain epitaxy formed after sacrificial layer removal. This segmentation allows the first epitaxy to serve as a protective foundation while the second epitaxy is formed in the exposed region, preventing damage during the etching process while still achieving the desired nanosheet FET structure.
Solution Approach 2:
The first source drain epitaxy is formed preliminarily before the sacrificial layers are removed. This preliminary formation creates a protective layer that prevents damage to the source drain region during the subsequent etching process, while still allowing the etching to proceed to release the nanosheet channel layers.
2Productivity
If source drain epitaxy grows laterally without proper nucleation sites, then device scalability is limited, but desirable stress cannot be provided on nanosheet channel layers
Solution Approach 1:
The patent applies different qualities to different regions: the second source drain epitaxy is formed with specific material composition and doping characteristics in the region where sacrificial layers were removed, providing localized stress to the nanosheet channel layers. This local quality enhancement ensures desirable stress is applied where needed while maintaining overall device scalability.
3Device complexity
If source drain epitaxy is formed before sacrificial layer removal, then manufacturing process is simplified, but epitaxy is damaged during etching
Solution Approach 1:
The source drain epitaxy formation process is segmented into two distinct steps: first forming the first source drain epitaxy before sacrificial layer removal, then forming the second source drain epitaxy after etching. This segmentation resolves the contradiction by allowing the first epitaxy to be formed when the process is simpler, while the second epitaxy is formed after the damaging etching step to ensure high quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The source drain epitaxy replacement enhances the structural and electrical integrity of nanosheet FETs by preventing damage from sacrificial layer etching and providing beneficial stress on nanosheet channel layers, improving device performance and scalability.
Implementation Method 1
a u-shaped third source drain epitaxy made of pure germanium or silicon germanium is grown on top of the remaining second source drain epitaxy
Implementation Method 2
At least one of the one or more metal contacts may transfer compressive stress on to the at least one nanosheet channel layer
Data Source
AI summary
A semiconductor structure may include a first nanosheet field-effect transistor formed on a first portion of a substrate, a second nanosheet field-effect transistor formed on a second portion of the substrate, and one or more metal contacts. The first field-effect transistor formed on the first portion of a substrate may include a first source drain epitaxy. A top surface of the first source drain epitaxy may be above a top surface of a top-most nanosheet channel layer. The second nanosheet field-effect transistor formed on the second portion of the substrate may include a second source drain epitaxy and a third source drain epitaxy. The second source drain epitaxy may be below the third source drain epitaxy. The third source drain epitaxy may be u-shaped and may be connected to at least one nanosheet channel layer.