Nano-Sheet FET Gate Replacement to Prevent Source/Drain Contact Defects
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Solution Overview
Problem
The increasing integration and decreasing size of semiconductor devices pose challenges in manufacturing nano-sheet FETs, particularly in preventing defects in source/drain contacts during the replacement metal gate process.
Innovation Solution
A method involving chemical mechanical polishing (CMP) and etching processes to form recessed regions, followed by the deposition of nitride layers and oxide layers, which helps in removing dummy gates and forming metal gates while preventing defects in source/drain contacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the degree of integration of semiconductor devices is increased and the size of elements is decreased, then the integration density is improved, but the manufacturing difficulty increases and defects in source/drain contacts occur
Solution Approach 1:
The gate structure is divided into multiple segments: dummy gate structures are formed first, then selectively removed in gate cut regions, and finally metal gates are formed only in active transistor regions. This segmentation allows precise control over where metal gates are present, preventing contact defects while maintaining high integration density.
Solution Approach 2:
Dummy gate structures are formed in advance across the entire substrate before metal gates are formed. These dummy gates serve as temporary placeholders that guide subsequent processing steps, including source/drain contact formation, ensuring precise alignment and preventing manufacturing defects in high-density integration.
2Adaptability or versatility
If dummy gate structures are formed and subsequently removed in gate cut regions, then design freedom is improved, but the number of manufacturing processes increases
Solution Approach 1:
The dummy gate structures serve multiple functions: they act as placeholders during manufacturing, define gate cut regions for design flexibility, and provide alignment references for subsequent metal gate formation. This multi-functionality reduces the need for separate process steps while achieving design freedom.
Solution Approach 2:
The dummy gate structures act as intermediary elements that facilitate the transition from preliminary patterning to final metal gate formation. They mediate the manufacturing process by providing a temporary structure that is selectively removed, enabling design flexibility without requiring entirely separate process sequences.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method ensures reliable semiconductor device manufacturing by preventing defects in source/drain contacts, allowing for greater design freedom and improved integration of nano-sheet FETs.
Implementation Method 1
removing upper portions of the first oxide layer and the dummy gate structures through chemical mechanical polishing (CMP) to expose the dummy gate
Implementation Method 2
etching an upper portion of the first oxide layer and the dummy gate by using a hard mask pattern to form a recessed region
Data Source
AI summary
A method of manufacturing a semiconductor device is provided. The method includes: forming, on a substrate, dummy gate structures extending in a first direction, spaced apart from one another along a second direction, forming a first oxide layer on the dummy gate structures, etching an upper portion of the first oxide layer and the dummy gate to form a recess region, providing a first nitride layer in the recessed region, forming a second oxide layer on the first nitride layer and the first oxide layer, partially removing upper portions of the first oxide layer and the second oxide layer and providing a second nitride layer on the first and second oxide layers.