Nanosheet FET Source/Drain Recrystallization for Dopant Activation
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Solution Overview
Problem
Defects such as (111) stacking faults and high resistance due to insufficient dopant activation in source-drain materials of nanosheet devices lead to on-current versus off-current degradation, and existing processes lack selectivity for strain recovery and dopant activation.
Innovation Solution
The implementation of solid-phase epitaxy regrowth (SPER) on amorphous source/drain materials to recrystallize and recover strain, reducing defects and enhancing dopant activation through a combination of amorphization ion implantation and annealing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional source-drain formation processes are used, then manufacturing simplicity is maintained, but stacking faults and high resistance occur due to insufficient dopant activation
Solution Approach 1:
The source-drain formation process is segmented into distinct stages: initial source-drain layer formation, amorphization ion implantation, and selective SPER annealing. This segmentation allows each stage to be optimized independently, achieving complete dopant activation while managing process complexity through systematic breakdown of the formation sequence.
Solution Approach 2:
Amorphization ion implantation is performed as a preliminary action before final source-drain formation. This pre-treatment creates an amorphous structure that facilitates subsequent dopant diffusion and activation during SPER annealing, ensuring complete dopant activation while reducing the complexity of the overall process by preparing the material in advance.
2Reliability
If source-drain materials are used without amorphization, then process simplicity is maintained, but stacking faults occur leading to on-current degradation
Solution Approach 1:
Amorphization ion implantation is applied as a preliminary anti-action to prevent stacking fault formation. By creating an amorphous structure before source-drain crystallization, the process prevents the formation of harmful (111) stacking faults that would otherwise occur during conventional crystallization, thereby improving reliability while managing complexity through targeted prevention.
Solution Approach 2:
The crystallographic state parameter of the source-drain material is changed from crystalline to amorphous through ion implantation, then controlled to recrystallize in a defect-free manner during SPER annealing. This parameter change eliminates stacking faults by bypassing the direct crystallization path that produces defects, achieving high reliability despite increased process complexity.
3Reliability
If selective SPER annealing is implemented, then dopant activation and strain recovery are improved, but process complexity increases
Solution Approach 1:
Selective SPER annealing applies different thermal treatments to different regions of the device. Source-drain regions receive optimized annealing conditions for complete dopant activation and strain recovery, while other regions receive different treatments. This local quality approach improves electrical performance by tailoring the annealing process to specific regional requirements without uniformly increasing complexity across the entire device.
Solution Approach 2:
Conventional thermal annealing is replaced with solid-phase epitaxy regrowth annealing, which uses solid-state diffusion mechanisms instead of simple thermal heating. This substitution enables complete dopant activation and strain recovery at controlled temperatures, improving electrical performance while managing process complexity through a more efficient physical mechanism.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
SPER improves electrical performance by reducing stacking faults and increasing dopant activation, thereby enhancing Ion-Ioff performance and source/drain resistance in nanosheet devices.
Implementation Method 1
forming an amorphous semiconductor layer by performing an ion implantation on the semiconductor layer
Implementation Method 2
forming a source/drain by performing solid-phase epitaxy regrowth on the amorphous semiconductor layer
Implementation Method 3
forming a recrystallized source/drain by annealing the amorphous semiconductor layer
Data Source
AI summary
A method includes forming a stack of nanostructures over a substrate; forming a source/drain opening adjacent the stack of nanostructures; forming a semiconductor layer in the source/drain opening; forming an amorphous semiconductor layer by performing an ion implantation on the semiconductor layer; and forming a recrystallized source/drain by annealing the amorphous semiconductor layer.