Nanosheet FET Passivation Layers for Dangling-Bond Current Loss

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Solution Overview

Problem

The scaling down of semiconductor devices increases complexity and resistance in active regions, leading to reduced drive current due to surface defects from dangling bonds, which existing technologies have not effectively addressed.

Innovation Solution

The implementation of passivation layers comprising fluorine, nitrogen, hydrogen, and chlorine atoms on the active regions of FET devices to react with and eliminate dangling bonds, thereby improving surface quality and drive current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor devices are scaled down to increase storage capacity and processing speed, then device density and performance are improved, but surface defects from dangling bonds increase leading to reduced drive current

Engineering Contradiction:
Improvestorage capacity and processing speedVSAvoiddrive current
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies this principle by using fluorine-containing substances to react with harmful dangling bonds on the semiconductor surface. The fluorine atoms bond with the dangling bonds, converting the harmful surface defects into beneficial passivated structures that improve drive current by 20% to 50% while maintaining the scaled-down device dimensions

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent changes the chemical composition parameter of the semiconductor surface by introducing fluorine-containing substances. This parameter change transforms the surface chemistry from having reactive dangling bonds to having stable fluorinated bonds, thereby improving electrical performance without changing the physical device dimensions

Inventive Principle:
Principle #35Parameter changes

2Length of moving object

If semiconductor devices are scaled down, then device dimensions are reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvedevice dimensionsVSAvoidmanufacturing process complexity
Core Design Contradiction:
Length of moving objectVSDevice complexity

Solution Approach 1:

The patent applies self-service by utilizing the natural reactivity of fluorine-containing substances with dangling bonds. The fluorine atoms automatically bond with exposed silicon atoms on the etched surface, providing self-passivation without requiring complex additional manufacturing steps or precise control of deposition parameters

Inventive Principle:
Principle #25Self-service

3Ease of manufacture

If existing technologies are used without fluorine treatment, then manufacturing process is simpler, but surface defects remain causing reduced drive current

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddrive current
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The fluorine-containing substance acts as an intermediary that bridges the gap between the etched semiconductor surface and the desired electrical performance. The fluorine atoms mediate the interaction by bonding to dangling bonds, thereby improving drive current while adding minimal process complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of passivation layers enhances drive current by 20% to 50% by mitigating surface defects, improving the performance of FET devices.

Implementation Method 1

passivation layers comprising fluorine, nitrogen, hydrogen, and chlorine atoms on the active regions of FET devices to react with and eliminate dangling bonds

Methodology Applied
Scientific EffectChemical bonding: Chemical Bonding

Data Source

PatentUS11929422B2Passivation layers for semiconductor devices
Publication Date: 2024.03.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11929422B2 patent drawing
  • US11929422B2 patent drawing
  • US11929422B2 patent drawing

AI summary

The structure of a semiconductor device with passivation layers on active regions of FET devices and a method of fabricating the semiconductor device are disclosed. The semiconductor device includes a substrate, first and second source/drain (S/D) regions disposed on the substrate, nanostructured channel regions disposed between the first and second S/D regions, a passivation layer, and a nanosheet (NS) structure wrapped around the nanostructured channel regions. Each of the S/D regions have a stack of first and second semiconductor layers arranged in an alternating configuration and an epitaxial region disposed on the stack of first and second semiconductor layers. A first portion of the passivation layer is disposed between the epitaxial region and the stack of first and second semiconductor layers and a second portion of the passivation layer is disposed on sidewalk of the nanostructured channel regions