Stacked Nanosheet and Overhanging Fin Layout for Contact Isolation

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Solution Overview

Problem

Nanosheet technology faces challenges in manufacturing contacts to a buried power rail without shorting adjacent contacts.

Innovation Solution

A semiconductor device is formed with a first spacer on a substrate, featuring nanosheets with a first width and fins with a second width larger than the first, achieved by forming alternating layers, removing sacrificial material, and epitaxially growing channel material to merge layers into fins.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If nanosheet technology is used for continuing CMOS scaling, then device density and scaling capability are improved, but contact manufacturing reliability deteriorates due to shorting risk between adjacent contacts to buried power rails

Engineering Contradiction:
Improvedevice densityVSAvoidcontact manufacturing reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent divides the contact structure into multiple segments: a first contact portion extending to the nanosheet and a second contact portion extending to the buried power rail. This segmentation allows independent control and formation of each contact region, preventing shorting between adjacent contacts while maintaining high device density through continued CMOS scaling.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary structure (the first contact portion) between the nanosheet contact and the buried power rail contact. This intermediary element acts as a mediator that separates the two contact functions, ensuring that contacts to adjacent nanosheets do not short while still providing proper electrical connection to the buried power rail through the second contact portion.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Shape

If alternating layers of sacrificial material and channel material are formed and then processed, then fin structure with larger width is achieved, but process complexity increases

Engineering Contradiction:
Improvefin widthVSAvoidprocess complexity
Core Design Contradiction:
ShapeVSDevice complexity

Solution Approach 1:

The patent performs preliminary actions by forming alternating layers of sacrificial material and channel material before final fin formation. The sacrificial layers are strategically placed and then selectively removed to create the desired fin width, allowing precise width control to be larger than the original nanosheet width while managing process complexity through pre-planned material deposition sequences.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes material parameters by using different sacrificial and channel materials with distinct etch selectivities and growth characteristics. By controlling the deposition thickness, material composition, and etch rates, the fin width parameter is adjusted to be larger than the nanosheet width, achieving the required geometric transformation through controlled parameter changes rather than complex mechanical processes.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the formation of nanosheets and FINFETs on a common substrate without shorting contacts, allowing for efficient integration and improved device performance.

Implementation Method 1

Epitaxially growing the layers of the alternating layer comprised of the channel material to merger the layers of the alternating layer comprised of the channel material to form a combine fin

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS12426355B2Integration of stacked nanosheets and FINFET that overhangs a bottom spacer
Publication Date: 2025.09.23 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US12426355B2 patent drawing
  • US12426355B2 patent drawing
  • US12426355B2 patent drawing

AI summary

A semiconductor device including a first spacer located on top of a substrate, where the first spacer has a first width in a first axis of a nanodevice. At least one fin located on top of the first spacer, where the at least one fin has a second width in the first axis of the nanodevice. Where the second width is larger than the first width.