Nanosheet GAA Channel Caps to Limit Width Loss and Capacitance
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Solution Overview
Problem
Silicon-channel-based nanosheet GAA devices face challenges due to the reduction in channel width during the removal of sacrificial nanosheets, leading to increased parasitic capacitance and reduced direct current, which diminishes overall performance.
Innovation Solution
The method involves selectively depositing semiconductor caps on the sidewalls of the channels to compensate for width loss and prevent etching of channel nanosheets, enhancing device performance by reducing parasitic capacitance and increasing direct current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If sacrificial nanosheets are removed to form channel structures, then device density is increased, but channel width is reduced leading to increased parasitic capacitance
Solution Approach 1:
Semiconductor caps are deposited on the sidewalls of channel members before the etching process to prevent width loss. These caps act as a preliminary protective measure that counteracts the harmful etching effect, ensuring the channel maintains its intended width and reducing parasitic capacitance while still allowing device density to increase through sacrificial nanosheet removal.
Solution Approach 2:
The semiconductor caps serve as an intermediary protective layer between the etching process and the channel members. This intermediary structure prevents direct contact between the etchant and channel sidewalls, thereby preserving channel dimensions and reducing parasitic capacitance without interfering with the overall device density improvement.
2Productivity
If sacrificial nanosheets are removed to form channel structures, then device density is increased, but direct current is reduced
Solution Approach 1:
The semiconductor caps are deposited in advance to prevent the etching-induced width reduction of channel members. By maintaining the original channel width, the caps preserve the direct current characteristics while still enabling the device density improvement that comes from removing sacrificial nanosheets.
3Ease of manufacture
If channel width is reduced during processing, then manufacturing simplicity is maintained, but device performance deteriorates
Solution Approach 1:
The semiconductor caps are deposited before the etching process to establish a protective barrier in advance. This preliminary action ensures that the channel members maintain their intended dimensions throughout subsequent processing steps, preserving device performance without adding significant manufacturing complexity.
Solution Approach 2:
The semiconductor caps act as an intermediary protective layer that simplifies the manufacturing process by preventing dimension loss during etching. This intermediary structure ensures that standard processing techniques can be used while still achieving the desired channel dimensions and device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor caps improve the dumbbell-shaped channel profile, reducing parasitic capacitance and increasing direct current, thereby enhancing the overall performance of nanosheet GAA devices.
Implementation Method 1
selectively depositing semiconductor caps on the sidewalls of the channels
Data Source
AI summary
Provided is a method for forming semiconductor devices. This method includes forming a fin-shaped structure comprising a fin stack portion including alternatively stacked first and second semiconductor portions, forming a dummy gate structure comprising a dummy gate stack across a channel region of the fin-shaped structure, forming source/drain features over source/drain regions of the fin-shaped structure on opposite sides of the dummy gate structure, removing the dummy gate stack to form a gate trench exposing sidewalls of the first and semiconductor portions, selectively removing the first semiconductor portions to release the second semiconductor layer portions in the channel region as channel members, depositing a dielectric material to fill gaps between the channel members; selectively growing semiconductor caps on the sidewalls of the channel members, removing the deposited dielectric material and forming a gate stack to surround the semiconductor caps and the channel members and fills the gaps.