Nanosheet Gate Dielectric Fluorination for Reliability and Mobility
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor devices continue to shrink in size, challenges arise in integrating electronic components efficiently while maintaining reliability and mobility, particularly in the formation of gate dielectrics and semiconductor layers.
Innovation Solution
The introduction of a fluorine treatment process for gate dielectrics, involving the deposition of a fluorine-containing layer and subsequent annealing to diffuse fluorine into the gate dielectrics, enhances the effective oxide thickness and improves the reliability and mobility of semiconductor devices by filling vacancies and attaching to dangling bonds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature size is reduced to improve integration density, then more components can be integrated into a given area, but reliability and mobility of gate dielectrics deteriorate
Solution Approach 1:
The patent applies parameter changes by introducing fluorine treatment to modify the chemical composition and physical properties of the gate dielectric layer. This treatment changes the effective oxide thickness and electrical characteristics of the gate dielectric, enabling reliable operation at reduced feature sizes without sacrificing integration density
Solution Approach 2:
The patent uses fluorine as an intermediary substance to treat the gate dielectric layer. The fluorine-containing layer acts as a mediator that transfers fluorine atoms into the gate dielectric through annealing, improving the dielectric properties without directly modifying the underlying semiconductor structure
2Productivity
If minimum feature size is reduced to improve integration density, then more components can be integrated into a given area, but mobility of semiconductor layers deteriorates
Solution Approach 1:
The fluorine treatment modifies physical parameters of the gate dielectric including effective oxide thickness and dielectric constant, which indirectly influences carrier mobility in the semiconductor channel by improving the quality of the gate dielectric-semiconductor interface
3Reliability
If fluorine treatment is applied to improve gate dielectric reliability, then effective oxide thickness increases and reliability improves, but process complexity increases
Solution Approach 1:
The patent applies preliminary action by depositing the fluorine-containing layer before the final gate electrode formation. This preliminary fluorine treatment prepares the gate dielectric in advance, ensuring proper electrical characteristics are established before subsequent processing steps
Solution Approach 2:
The fluorine-containing layer serves as an intermediary that enables fluorine transfer to the gate dielectric without requiring direct fluorine exposure or complex in-situ fluorination processes, simplifying the overall fabrication sequence
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process results in improved yield and robustness of semiconductor devices by tuning the voltage and enhancing the performance of gate dielectrics, leading to better integration density and functionality.
Implementation Method 1
performing an anneal process to diffuse fluorine from the fluorine-containing layer into the gate dielectric
Implementation Method 2
performing an anneal process to diffuse fluorine from the fluorine-containing layer into the gate dielectric
Data Source
AI summary
A method includes forming a plurality of nanostructures over a substrate; etching the plurality of nanostructures to form recesses; forming source/drain regions in the recesses; removing first nanostructures of the plurality of nanostructures leaving second nanostructures of the plurality of nanostructures; depositing a gate dielectric over and around the second nanostructures; depositing a protective material over the gate dielectric; performing a fluorine treatment on the protective material; removing the protective material; depositing a first conductive material over the gate dielectric; and depositing a second conductive material over the first conductive.


