III-V Nanosheet Transistor Gate Stack for Reduced Parasitic Capacitance

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Solution Overview

Problem

Nanosheet field effect transistors with varying threshold voltages face challenges due to high parasitic capacitance caused by large vertical spacing required for accommodating different gate thicknesses, making fabrication difficult.

Innovation Solution

A nanosheet field effect transistor design with a III-V semiconductor channel and a noncrystalline semiconductor gate, where the gate composition is adjusted to change the threshold voltage, using a high dielectric constant dielectric layer and a polycrystalline semiconductor gate layer less than 15 nm thick, allowing for varying threshold voltages on a single chip by varying the gate material composition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If workfunction metal gates with different thicknesses are used to achieve different threshold voltages, then a range of threshold voltages can be obtained, but parasitic capacitance increases due to large vertical spacing required to accommodate the largest gate thickness

Engineering Contradiction:
Improvethreshold voltage rangeVSAvoidparasitic capacitance
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the material parameter of the gate from metal to noncrystalline semiconductor (such as amorphous silicon), which fundamentally alters the electrical characteristics. This material parameter change enables achieving different threshold voltages through doping concentration control rather than thickness variation, thereby reducing the vertical spacing requirement and parasitic capacitance

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the physical dimension control mechanism (gate thickness) with a material composition control mechanism (doping concentration in noncrystalline semiconductor). This substitution allows threshold voltage tuning without requiring large vertical spacing, thus resolving the parasitic capacitance issue

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If workfunction metal gates with different thicknesses are used to achieve different threshold voltages, then a range of threshold voltages can be obtained, but fabrication complexity increases

Engineering Contradiction:
Improvethreshold voltage rangeVSAvoidfabrication complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The noncrystalline semiconductor gate material serves multiple functions: it provides the gate structure itself, enables threshold voltage tuning through doping concentration, and maintains compatibility with standard semiconductor fabrication processes. This multi-functionality simplifies the overall fabrication process compared to using different metal gate thicknesses

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

By changing the gate material to noncrystalline semiconductor and controlling doping concentration as the primary parameter for threshold voltage adjustment, the patent simplifies the fabrication process. This approach uses well-established semiconductor doping techniques rather than requiring precise control of thin metal layer thicknesses, which are more difficult to fabricate

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces parasitic capacitance, enabling the fabrication of multiple transistors with different threshold voltages on a single chip, improving performance by minimizing gate depletion and maintaining drive current, while allowing precise tuning of threshold voltages.

Implementation Method 1

the gate, which may be separated from the channel by a high dielectric constant dielectric layer

Methodology Applied
Scientific EffectDielectric: Dielectric

Implementation Method 2

Adjusting the composition of the gate may result in a change in the affinity of the gate, in turn resulting in a change in the threshold voltage

Methodology Applied
Scientific EffectWork function modulation:

Data Source

PatentUS9812449B2Multi-VT gate stack for III-V nanosheet devices with reduced parasitic capacitance
Publication Date: 2017.11.07 SAMSUNG ELECTRONICS CO LTD
  • US9812449B2 patent drawing
  • US9812449B2 patent drawing
  • US9812449B2 patent drawing

AI summary

A nanosheet field effect transistor design in which the threshold voltage is adjustable by adjusting the composition of the gate. The channel of the nanosheet field effect transistor may be composed of a III-V semiconductor material, and the gate, which may be separated from the channel by a high dielectric constant dielectric layer, may also be composed of a III-V semiconductor material. Adjusting the composition of the gate may result in a change in the affinity of the gate, in turn resulting in a change in the threshold voltage. In some embodiments the channel is composed, for example, of InxGa1-xAs, with x between 0.23 and 0.53, and the gate is composed of InAs1-yNy with y between 0.0 and 0.4, and the values of x and y may be adjusted to adjust the threshold voltage.