Nanosheet Gate Structures With Vertical Offsets for Longer Gates
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Solution Overview
Problem
Conventional nanosheet devices have limited gate lengths due to the use of entirely straight semiconductor channel material nanosheets, necessitating a need for increased gate length without altering the device footprint.
Innovation Solution
A vertical stack of suspended semiconductor channel material nanosheets is implemented, with a middle portion vertically offset from the end portions, allowing for an increased gate length by forming an undulating semiconductor substrate with outward or inward bumped surfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If entirely straight semiconductor channel material nanosheets are used, then the device structure is simple and easy to manufacture, but the gate length is limited and cannot be increased without increasing footprint
Solution Approach 1:
The patent introduces vertical offset (z-dimension) to the nanosheet structure. The middle portion of the nanosheet is positioned at a different vertical level than the end portions, creating an undulating configuration. This vertical displacement allows the gate to extend longer along the channel direction without increasing the horizontal footprint, effectively resolving the contradiction between gate length and device area.
Solution Approach 2:
The patent employs a curved/undulating nanosheet geometry where the middle portion is vertically offset from the end portions. This curvature in the vertical direction allows the channel to achieve a longer effective length while maintaining a compact horizontal footprint, directly addressing the gate length vs. footprint contradiction.
2Length of moving object
If entirely straight semiconductor channel material nanosheets are used, then the manufacturing process is straightforward, but the gate length cannot be increased for equivalent footprint devices
Solution Approach 1:
By utilizing the vertical dimension for offsetting the middle portion of the nanosheet, the patent achieves increased gate length without complicating the horizontal layout. The vertical offset can be implemented through controlled deposition or etching processes, adding functionality without proportionally increasing manufacturing complexity.
Solution Approach 2:
The patent applies local structural modification by offsetting only the middle portion of the nanosheet while keeping the end portions at the original level. This localized change achieves the desired gate length extension without requiring complete restructuring of the entire nanosheet, thereby limiting the increase in manufacturing complexity.
Data Source
AI summary
Semiconductor structures having an increased gate length are provided by providing a vertical stack of suspended semiconductor channel material nanosheets that include a middle portion located between a first end portion and a second end portion. The middle portion of each suspended semiconductor channel material nanosheet is vertically offset from (i.e., higher or lower than) the first end portion and the second end portion of each suspended semiconductor channel material nanosheet.