Nanosheet Gate Structure With Thin Silicon Work Function Layer

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Solution Overview

Problem

The challenge in semiconductor manufacturing is achieving further size reduction of gate-all-around transistors while maintaining effective gate control, as existing work function adjustment layers with aluminum-containing materials hinder down-scaling due to their thickness requirements.

Innovation Solution

Employing a silicon-containing work function adjustment layer with a reduced thickness to achieve the desired band-edge work function, allowing for further down-scaling of semiconductor devices by replacing aluminum-containing materials with silicon-based alternatives.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If aluminum-containing work function adjustment layers are used, then desired band-edge work function is achieved, but layer thickness cannot be reduced further hindering device down-scaling

Engineering Contradiction:
Improvework function adjustment layer thicknessVSAvoidgate control effectiveness
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The patent changes the material composition parameter of the work function adjustment layer from aluminum-containing materials to silicon-containing materials. This parameter change enables the layer to achieve the desired band-edge work function at a reduced thickness, allowing device down-scaling while maintaining gate control effectiveness. The silicon-containing material provides the necessary work function characteristics with thinner layer thickness compared to conventional aluminum-based materials.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If device dimensions are scaled down, then production efficiency improves and costs lower, but manufacturing process complexity increases

Engineering Contradiction:
Improveproduction efficiencyVSAvoidmanufacturing process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent employs parameter changes in material composition to simplify the manufacturing process at scaled dimensions. By using silicon-containing work function adjustment layers instead of aluminum-containing layers, the patent achieves the desired electrical characteristics with reduced thickness, which simplifies subsequent processing steps and reduces manufacturing complexity at advanced technology nodes.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The silicon-containing work function adjustment layer enables smaller semiconductor device dimensions while maintaining gate control, facilitating advanced technology nodes with improved performance and efficiency.

Implementation Method 1

a silicon-containing work function adjustment layer with a reduced thickness to achieve the desired band-edge work function

Methodology Applied
Scientific EffectWork function adjustment:

Data Source

PatentUS20250366101A1Semiconductor structure including nanosheet channel structure and method for forming the same
Publication Date: 2025.11.27 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250366101A1 patent drawing
  • US20250366101A1 patent drawing
  • US20250366101A1 patent drawing

AI summary

The present disclosure provides a semiconductor structure and a method for forming the same. The method includes: forming a first nanosheet channel structure and a second nanosheet channel structure, parallel to the first nanosheet channel structure, over a substrate; depositing a first high-k dielectric layer and a second high-k dielectric layer on the first nanosheet channel structure and the second nanosheet channel structure, respectively; introducing a silicon-based precursor to deposit a work function adjustment layer on the first and second high-k dielectric layers, wherein the work function adjustment layer comprises a silicon portion separating the first and second high-k dielectric layers, wherein the silicon portion comprises a void between the first nanosheet channel structure and the second nanosheet channel structure; performing an oxidation operation on the silicon portion to form an oxide coating on the silicon portion; and depositing a metal layer over the oxide coating.