Nanosheet MOSFET Isolated Source/Drain Epitaxy
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Solution Overview
Problem
Current nanosheet containing devices face issues with parasitic leakage current due to the functional gate structure touching the semiconductor substrate and source/drain regions not being in close proximity to the channel, leading to potential leakage paths and sharp junctions.
Innovation Solution
A semiconductor structure is formed with a sacrificial inner dielectric spacer on the sidewalls of recessed nanosheets, followed by selective epitaxial growth of a local isolation region and source/drain structures in close proximity to the channel, with the sacrificial spacers removed to create a gap between inner dielectric spacers for the source/drain structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the functional gate structure touches the semiconductor substrate, then the device structure is simplified, but parasitic leakage current paths are created
Solution Approach 1:
An inner dielectric spacer is introduced as an intermediary element between the functional gate structure and the semiconductor substrate. This spacer physically separates the gate from the substrate, eliminating direct contact and the associated parasitic leakage current paths while maintaining the overall device architecture.
2Ease of manufacture
If source/drain regions are formed away from the channel, then fabrication is easier, but junction sharpness and device performance deteriorate
Solution Approach 1:
The source/drain regions are formed in close proximity to the channel through preliminary epitaxial growth before final device completion. This preliminary positioning of source/drain regions enables sharp junctions and optimal device performance while maintaining fabrication feasibility through subsequent processing steps.
3Device complexity
If no local isolation region is formed, then fabrication steps are reduced, but parasitic leakage current under the channel cannot be prevented
Solution Approach 1:
A local isolation region is formed selectively beneath the source/drain regions through epitaxial growth. This localized isolation structure provides targeted prevention of parasitic leakage current under the channel while minimizing the overall impact on device structure and fabrication complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration prevents parasitic leakage current under the stack of semiconductor channel nanosheets while ensuring the source/drain structure is in close proximity to the channel, allowing for sharp junctions and improved device performance.
Implementation Method 1
A sacrificial inner dielectric spacer is formed on physically exposed sidewalls of each recessed semiconductor channel material nanosheet
Implementation Method 2
A local isolation region is then formed by selective epitaxial growth on a surface of a semiconductor substrate containing the nanosheet material stack
Data Source
AI summary
A sacrificial inner dielectric spacer is formed on physically exposed sidewalls of each recessed semiconductor channel material nanosheet of a nanosheet material stack that further includes recessed sacrificial semiconductor material nanosheets that have an inner dielectric spacer formed on physically exposed sidewalls thereof. A local isolation region is then formed by selective epitaxial growth on a surface of a semiconductor substrate containing the nanosheet material stack. After forming the local isolation region, the sacrificial inner dielectric spacers are removed and a source/drain region is formed on the physically exposed surface of each recessed semiconductor channel material nanosheet. A portion of the source/drain structure is formed in a gap located between each neighboring pair of vertically spaced apart inner dielectric spacers.