Nanosheet MOSFET Partial Release Strain Preservation

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Solution Overview

Problem

Current semiconductor technologies face challenges in preserving compressive strain in nanosheet MOSFETs during the fabrication process, which affects the electrical performance and current transport in nanosheet devices.

Innovation Solution

The method involves forming a heteroepitaxial film stack with sacrificial and channel layers, growing epitaxial source/drain material, and partially removing sacrificial layers to maintain strain, allowing for a replacement gate stack while avoiding source/drain recess etches, which helps in preserving compressive strain and enhancing current transport.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional fabrication processes are used, then manufacturing simplicity is maintained, but compressive strain is lost during fabrication

Engineering Contradiction:
Improvecompressive strain preservationVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The heteroepitaxial film stack is formed with sacrificial layers and channel layers in a specific configuration before the actual transistor fabrication begins. This preliminary structuring allows strain to be built into the system early, where it can be preserved through subsequent processing steps that would otherwise relax or remove the strain in conventional approaches.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Silicon germanium sacrificial layers are introduced as intermediary materials between the source/drain regions and the silicon channel. These sacrificial layers serve a dual purpose: they enable the epitaxial growth of strained silicon channel layers, and they are later selectively removed to create the final device structure while preserving the compressive strain in the channel.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If source/drain recess etches are performed, then source/drain contact is improved, but compressive strain in channel layers is relaxed

Engineering Contradiction:
Improvecompressive strain preservationVSAvoidsource/drain contact formation
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The silicon germanium sacrificial layers are selectively extracted from the heteroepitaxial film stack through selective etching processes. This extraction creates the necessary source/drain contact regions while leaving the silicon channel layers intact and strained, thereby achieving both good electrical contact and strain preservation without requiring traditional recess etches.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The material composition parameter is changed from silicon germanium (sacrificial) to silicon (channel) in a controlled manner through selective removal. This parameter change enables the transition from a strained heteroepitaxial structure to a functional transistor with preserved compressive strain in the channel, while establishing proper source/drain contacts.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively preserves compressive strain in silicon germanium channel layers, increasing current transport and electrical channel width, thereby improving the performance of nanosheet MOSFETs.

Implementation Method 1

forming a heteroepitaxial film stack including at least one sacrificial layer and at least one channel layer

Methodology Applied
Scientific EffectHeteroepitaxy: Epitaxy

Implementation Method 2

forming an epitaxial source/drain material along the patterned heteroepitaxial film stack sidewalls

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 3

The structure can be subjected to an additional thermal budget allowing the silicon-germanium (SiGe) and silicon sacrificial layers to completely relax

Methodology Applied
Scientific EffectThermal relaxation: Heat Treatment

Data Source

PatentUS10249739B2Nanosheet MOSFET with partial release and source/drain epitaxy
Publication Date: 2019.04.02 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10249739B2 patent drawing
  • US10249739B2 patent drawing
  • US10249739B2 patent drawing

AI summary

A method is presented for forming a nanosheet metal oxide semiconductor field effect transistor (MOSFET) structure. The method includes forming a heteroepitaxial film stack including at least one sacrificial layer and at least one channel layer, patterning the heteroepitaxial film stack, forming a dummy gate stack with sidewall spacers, and forming a cladded or embedded epitaxial source/drain material along the patterned heteroepitaxial film stack sidewalls. The method further includes removing the dummy gate stack, partially removing the at least one sacrificial layer, and forming a replacement gate stack.