3D Nanosheet Stack Contact Layout for Lower Source/Drain Access
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Solution Overview
Problem
Forming a contact electrode that is electrically connected to the source/drain area of a lower transistor in stack-type semiconductor devices with 3D transistors is difficult.
Innovation Solution
A stack-type semiconductor device design that includes a first nanosheet stack structure on a substrate, with source/drain regions on its side surfaces, and contact holes extending vertically to accommodate a contact electrode that directly or indirectly contacts the source/drain regions through intermediate electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If 3D transistors are stacked vertically to increase device density, then the integration density is improved, but the difficulty of forming contact electrodes to lower source/drain regions increases
Solution Approach 1:
The patent transitions from planar contact formation to vertical contact formation by extending contact holes in the depth direction through the upper transistor structure to reach the lower source/drain region. This dimensional change enables electrical connection in the Z-axis direction, solving the accessibility problem created by vertical stacking while maintaining high device density.
Solution Approach 2:
The patent introduces an intermediate electrode structure that bridges the upper and lower transistor regions. This intermediate structure serves as a mediator that facilitates electrical connection between the contact electrode and the lower source/drain region, which would otherwise be inaccessible due to the stacked configuration.
2Reliability
If contact holes are formed to reach lower source/drain regions, then electrical connection is achieved, but the manufacturing process complexity increases
Solution Approach 1:
The patent divides the contact formation process into segmented steps: forming contact holes through the upper transistor, depositing conductive materials in stages, and creating intermediate electrodes separately. This segmentation of the manufacturing process makes the complex task of reaching lower source/drain regions more manageable and controllable.
Solution Approach 2:
The patent performs preliminary actions by forming the contact hole structure and intermediate electrodes before finalizing the upper transistor contacts. This preliminary preparation ensures that the path to lower source/drain regions is established early, simplifying subsequent manufacturing steps and improving overall process efficiency.
Data Source
AI summary
A stack-type semiconductor device includes: a first nanosheet stack structure arranged on a substrate; a first source/drain region extending on a side surface of the first nanosheet stack structure; a second nanosheet stack structure stacked on the first nanosheet stack structure; a second source/drain region extending on a side surface of the second nanosheet stack structure; a contact hole adjacent to a side surface of the second source/drain region and a side surface of the first source/drain region and extending in a vertical direction with respect to a surface of the substrate; and a contact electrode disposed in the contact hole, wherein the contact electrode contacts the side surface of the first source/drain region.