Nanosheet Stack Layer Orientation for MBCFET Carrier Mobility
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Solution Overview
Problem
Current semiconductor devices face limitations in further miniaturization and performance enhancement, particularly for FinFETs, and require improved integration and performance for Multi-Bridge Channel Field Effect Transistors (MBCFETs).
Innovation Solution
A semiconductor device with a nanosheet stack layer on a substrate, where nanosheets are oriented in different orientations relative to the substrate, allowing for optimized carrier mobility and mechanical stability, and can be used in MBCFETs or Multi-Wave Bridge Channel Field Effect Transistors (MWCFETs) with zigzag or wavy channel shapes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional FinFET structure is used, then manufacturing process is relatively simple, but further miniaturization is limited
Solution Approach 1:
The channel is segmented into multiple nanosheets stacked vertically, each nanosheet providing an independent conduction path. This segmentation enables further miniaturization by increasing the effective channel width in the vertical dimension while maintaining a small footprint on the substrate, thereby resolving the limitation of conventional FinFET miniaturization.
Solution Approach 2:
The invention transitions from a planar 2D channel structure to a 3D stacked nanosheet structure. By utilizing the vertical dimension to stack multiple nanosheets, the effective channel width is increased without expanding the lateral footprint, enabling further device miniaturization while maintaining manufacturing feasibility.
2Reliability
If MBCFET structure is adopted, then performance enhancement is achieved, but integration and performance require further improvement
Solution Approach 1:
Different nanosheets within the stack are assigned different crystal orientations ({100}, {110}, or {111} planes). This local quality variation optimizes carrier mobility for specific device types (n-type or p-type) at different positions in the stack, enhancing overall device performance and enabling high-performance integration in CMOS configurations.
Solution Approach 2:
The nanosheet stack structure serves multiple functions: it provides high-performance channels for both n-type and p-type devices, enables flexible device integration, and allows optimization of carrier mobility through crystal orientation selection. This multi-functionality improves both device performance and integration density.
3Reliability
If nanosheets with non-parallel surfaces are used, then carrier mobility is optimized, but manufacturing complexity increases
Solution Approach 1:
The crystal orientation parameter of nanosheets is changed to non-{100} planes ({110} or {111}), which optimizes carrier mobility for specific device types. This parameter change enables high-performance transistor channels while the stack structure maintains manufacturability through standardized fabrication processes.
Data Source
AI summary
Provided are a semiconductor device, a method of manufacturing the semiconductor device, and an electronic apparatus including the semiconductor device. According to the embodiments, the semiconductor device may include: a nanosheet stack layer on a substrate including a plurality of nanosheets spaced apart from each other in a vertical direction relative to the substrate, wherein at least one of the plurality of nanosheets includes a first portion in a first orientation, and at least one of an upper surface and a lower surface of the first portion is not parallel to a horizontal surface of the substrate.