Nanosheet Structure With Stacked Junction Diodes for Voltage Tolerance
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Solution Overview
Problem
Nanosheet devices face challenges with voltage tolerance and high-speed control, particularly in high-voltage applications, limiting their use in advanced semiconductor integrated circuits.
Innovation Solution
Incorporating multiple stacked junction diodes in the substrate below the nanosheet device to increase voltage tolerance, allowing the device to handle higher voltage levels and improve high-speed performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If nanosheet devices are used in low-voltage IC components, then device density and integration are improved, but voltage tolerance deteriorates
Solution Approach 1:
The patent implements a nested structure where junction diodes are embedded within the substrate beneath the nanosheet device channel. The first and second junction diodes are vertically stacked and laterally offset, creating a nested configuration that provides voltage tolerance enhancement without occupying lateral device area. This nested arrangement allows the nanosheet device to maintain high density while the embedded diodes provide the necessary voltage handling capability.
2Reliability
If multiple stacked junction diodes are added to increase voltage tolerance, then voltage handling capability is improved, but device complexity increases
Solution Approach 1:
The patent resolves the complexity issue by transitioning from a lateral arrangement to a vertical stacking configuration. The first and second junction diodes are stacked vertically with lateral offsets, utilizing the vertical dimension to provide multiple voltage handling paths without increasing lateral footprint. This dimensional transition allows the device to achieve enhanced voltage tolerance while maintaining a compact structure that integrates seamlessly with the nanosheet device.
3Reliability
If nanosheet devices are designed for high-voltage applications, then voltage tolerance is improved, but control under high-speed conditions deteriorates
Solution Approach 1:
The patent applies local quality by providing voltage tolerance enhancement only in specific regions where high-voltage stress occurs. The junction diodes are positioned in the substrate beneath the channel, localized to areas experiencing high electric fields. This localized approach allows the nanosheet device to maintain excellent high-speed control in the channel region while providing targeted voltage tolerance protection where needed, thus resolving the contradiction between voltage handling and speed performance.
Data Source
AI summary
A semiconductor structure includes a substrate and a stack of p-n junction structures embedded in the substrate. The semiconductor structure includes a semiconductor fin protruding from the substrate. The semiconductor structure includes a pair of source/drain structures disposed in the semiconductor fin. The semiconductor structure includes a gate structure over a channel region of the semiconductor fin and interposed between the pair of source/drain structures.


