Nanosheet Substrate Isolation via Lattice-Matched Wide Bandgap Semiconductor

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Solution Overview

Problem

Current nanosheet-based semiconductor devices face parasitic leakage issues due to the gate contacting the substrate, leading to off-state leakage current, which needs to be controlled without interfering with the device operation.

Innovation Solution

A lattice-matched wide bandgap semiconductor material with semi-insulating properties is used as an isolation layer between the substrate and the suspended semiconductor channel material nanosheets, eliminating parasitic leakage paths while maintaining device functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the gate contacts the substrate directly, then the device structure is simple and easy to manufacture, but parasitic leakage current occurs between source and drain regions

Engineering Contradiction:
Improveoff-state leakage controlVSAvoidisolation layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

An isolation layer composed of semi-insulating wide bandgap semiconductor material is introduced between the substrate and the gate contact, serving as an intermediary that blocks parasitic leakage current paths while maintaining the electrical functionality of the device

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If an isolation layer is added to eliminate parasitic leakage, then off-state leakage control improves, but the device structure becomes more complex

Engineering Contradiction:
Improveparasitic leakage eliminationVSAvoidfabrication process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The isolation layer utilizes wide bandgap semiconductor material with specific doping concentrations to achieve semi-insulating properties, changing the electrical parameters of the substrate interface to block leakage currents while maintaining compatibility with existing fabrication processes

Inventive Principle:
Principle #35Parameter changes

3Reliability

If a wide bandgap semiconductor material is used for the isolation layer, then parasitic leakage paths are eliminated, but material selection and lattice matching requirements increase complexity

Engineering Contradiction:
Improveleakage current controlVSAvoidlattice matching requirement
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The isolation layer is applied locally at the substrate interface where leakage occurs, using wide bandgap semiconductor material with specific crystalline orientation and lattice matching to the substrate, ensuring high precision only where needed rather than throughout the entire device structure

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The isolation layer effectively reduces parasitic leakage current between the source and drain regions, enhancing the off-state leakage control without disrupting the operation of the nanosheet CMOS devices.

Implementation Method 1

a thin layer of lattice matched wide bandgap semiconductor material having semi-insulating properties is employed as an isolation layer between the substrate and a vertical stack of suspended semiconductor channel material nanosheets

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS10559692B2Nanosheet substrate isolation scheme by lattice matched wide bandgap semiconductor
Publication Date: 2020.02.11 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10559692B2 patent drawing
  • US10559692B2 patent drawing
  • US10559692B2 patent drawing

AI summary

A thin layer of lattice matched wide bandgap semiconductor material having semi-insulating properties is employed as an isolation layer between the substrate and a vertical stack of suspended semiconductor channel material nanosheets. The presence of such an isolation layer eliminates the parasitic leakage path between the source region and the drain region that typically occurs through the substrate, while not interfering with the CMOS device that is formed around the semiconductor channel material nanosheets.