Nanosheet Transistor Insulating Wall for Device Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current transistor technologies face challenges in reducing the separation between nanosheet transistor devices, limiting further scaling and increasing the risk of merging of source and drain regions during epitaxial growth, which affects electrostatic control and device performance.
Innovation Solution
A method is developed to form nanosheet transistor structures with an insulating wall separating them, allowing for closer spacing and improved lateral etch control, where each transistor has a source, drain, and channel with a gate extending across, and the insulating wall provides physical and electrical isolation, simplifying patterning and reducing the risk of source/drain merging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the separation between nanosheet transistor devices is reduced to improve area efficiency, then the device density increases, but the risk of merging source and drain regions during epitaxial growth increases
Solution Approach 1:
An insulating wall is introduced as an intermediary structure between adjacent nanosheet transistor devices. This insulating wall physically separates the devices and prevents lateral epitaxial growth from causing source/drain merging, enabling reduced device separation while maintaining reliability.
Solution Approach 2:
The insulating wall segments the continuous epitaxial growth region into isolated sections, preventing lateral growth from propagating between adjacent devices. This segmentation allows devices to be placed closer together without the risk of source/drain region merging.
2Area of stationary object
If the separation between nanosheet transistor devices is reduced to improve area efficiency, then the cell height scaling improves, but lateral etch control during metal gate formation becomes more difficult
Solution Approach 1:
The insulating wall acts as a physical barrier and etch stop layer during metal gate formation processes. This intermediary structure provides defined boundaries that improve lateral etch control, allowing for closer device spacing while maintaining manufacturing precision.
Solution Approach 2:
The insulating wall is formed in advance before metal gate formation and epitaxial growth steps. This preliminary action establishes fixed boundaries that guide subsequent lateral etching processes, ensuring precise control even at reduced device separations.
3Area of stationary object
If the separation between nanosheet transistor devices is reduced to improve area efficiency, then the electrostatic control improves, but the PN separation margin decreases
Solution Approach 1:
The insulating wall serves as a protective intermediary that maintains adequate PN separation margin by preventing lateral epitaxial growth from bridging between P and N devices. This allows devices to be positioned closer together while preserving the necessary separation margin for reliable operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables reduced separation between nanosheet transistors, improving electrostatic control, sub-threshold swing, reducing leakage, and increasing drive current by allowing partial release of channel portions and self-aligned gate stacks, thus enhancing device performance.
Implementation Method 1
forming the insulating wall between the first stack and the second stack, comprising depositing an insulating material filling the trench and the recesses
Implementation Method 2
forming a respective channel portion of the first and second nanosheet transistor structure, comprising removing sacrificial material from the first and second stacks to expose upper and lower surfaces of a nanosheet portion
Implementation Method 3
a channel extending between the source and the drain in a first direction
Data Source
AI summary
According to an aspect of the present inventive concept there is provided a method for forming a first and a second nanosheet transistor structure, each comprising a source, a drain, and a channel extending between the source and the drain in a first direction, and a gate extending across the channel, wherein the first and second nanosheet transistor structures are spaced apart in a second direction, transverse to the first direction, by an insulating wall extending in the first direction.