Nanosheet Transistors With Strained Gate Trenches
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Solution Overview
Problem
Scaling down semiconductor devices to sub-7 nanometer CMOS technology challenges the introduction of high channel mobility due to small and poly-crystalline epitaxially grown source/drain regions, resulting in limited longitudinal strain and reduced carrier mobility.
Innovation Solution
Introducing transverse strain in nanosheet channel transistors by forming trenches in the replacement metal gate, spacer, and inter-level dielectric and filling them with a strained material, such as tensile strained silicon nitride, to enhance carrier mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional epitaxial source/drain growth is used to scale down devices, then device density increases, but channel mobility deteriorates due to limited longitudinal strain
Solution Approach 1:
The patent transitions from longitudinal strain (along the channel direction) to transverse strain (perpendicular to the channel direction) by forming trenches in the gate structure and filling them with strained material. This dimensional change in strain application enables improved carrier mobility while maintaining scaled device dimensions.
Solution Approach 2:
The patent applies strain locally by forming trenches only in specific regions of the gate structure and filling them with strained material. This localized approach targets the channel region specifically, providing strain enhancement where needed without affecting other device components.
2Reliability
If gate material is removed to form trenches, then transverse strain can be introduced, but gate structural integrity may deteriorate
Solution Approach 1:
The patent modifies the gate structure by changing its physical parameters - creating trenches with specific dimensions, depths, and spacing. These parameter changes are optimized to provide sufficient strain introduction while maintaining adequate structural integrity for device operation.
Solution Approach 2:
The gate structure becomes a composite system combining the original gate material with the strained material filled in the trenches. This composite structure leverages the mechanical properties of both materials to achieve strain enhancement while preserving structural strength.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively increases carrier mobility in both n-type and p-type FETs by creating transverse strain, improving switching response and device performance, which is challenging to achieve through conventional epitaxial source/drain growth.
Implementation Method 1
forming a strained material along a sidewall surface of the gate, wherein the strained material is configured to create strain in the channel nanosheet layers of the nanosheet stack
Data Source
AI summary
A method of fabricating a semiconductor device is described. The method includes forming a nanosheet stack on a substrate, the nanosheet stack includes nanosheet channel layers. A gate is formed around the nanosheet channel layers of the nanosheet stack. A strained material is formed along a sidewall surface of the gate. The strained material is configured to create strain in the nanosheet channel layers of the nanosheet stack.