Nanosheet Transistor Wrap-Around Contact Capacitance Reduction
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Solution Overview
Problem
There is a trade-off in CMOS scaling between reducing contact resistance and gate-to-source/drain capacitance, as increasing contact surface area leads to higher gate-to-source/drain capacitance, and existing wrap-around contact configurations are inefficient in minimizing excess conductive material in the source/drain region.
Innovation Solution
A method involving the use of a sacrificial layer to define contact thickness, replacing excess contact material with a filler dielectric, and forming a contact liner in the void created after removing the sacrificial material, which reduces gate-to-source/drain capacitance while maintaining a high contact surface area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wrap-around contact configuration is used to increase contact surface area, then contact resistance is reduced, but gate-to-source/drain capacitance increases
Solution Approach 1:
The contact structure is segmented into two distinct parts: a contact liner that provides electrical connection and a dielectric filler that replaces excess conductive material. This segmentation allows the contact to maintain high surface area for low resistance while the dielectric portion reduces parasitic capacitance to the gate.
Solution Approach 2:
Different materials are used in different regions of the contact structure. The contact liner material (conductive) is placed where electrical connection is needed, while the dielectric filler material is placed in regions where reducing capacitance is prioritized. This local differentiation of material properties resolves the contradiction between conductivity and capacitance reduction.
2Use of energy by moving object
If excess conductive material is removed from source/drain region, then gate-to-source/drain capacitance is reduced, but contact surface area may be insufficient
Solution Approach 1:
The contact liner is deposited conformally on the source/drain structure before the dielectric filler is added. This preliminary placement of the conductive liner ensures that the essential electrical connection pathway is established first, and subsequent dielectric filling does not compromise this connection while still reducing overall capacitance.
Solution Approach 2:
The contact liner acts as an intermediary conductive element between the source/drain region and the overlying interconnect. By confining the conductive material to this essential intermediary pathway and replacing non-essential conductive material with dielectric, the structure maintains necessary conductivity while reducing parasitic capacitance.
Data Source
AI summary
An embodiment includes a method of forming a semiconductor device and the resulting device. The method may include forming a source/drain on an exposed portion of a semiconductor layer of a layered nanosheet. The method may include forming a sacrificial material on the source/drain. The method may include forming a dielectric layer covering the sacrificial material. The method may include replacing the sacrificial material with a contact liner. The semiconductor device may include a first gate nanosheet stack and second gate nanosheet stack. The semiconductor device may include a first source/drain in contact with the first nanosheet stack and a second source/drain in contact with the second nanosheet stack. The semiconductor device may include a source/drain dielectric located between the first source/drain and the second source/drain. The semiconductor device may include a contact liner in contact with the first source/drain, the second source/drain and the source/drain dielectric.