Nanostructure Array Patterning With Single-Chamber Spacer Cycling
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Solution Overview
Problem
Self-aligned multiple patterning processes face challenges such as high costs, technical difficulties in process control, and structural imperfections due to the formation and removal of spacer structures, which limit the ability to achieve sub-100 nm patterns efficiently.
Innovation Solution
A method involving a cyclic modification process to selectively apply spacer structures on sidewalls of sacrificial nanostructures, allowing all process steps to be performed in a single chamber, reducing defects and enabling further downscaling to nanostructures below 20 nm by repeating the process multiple times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If self-aligned multiple patterning is used to achieve sub-100 nm patterns, then manufacturing precision is improved, but device complexity and cost increase due to multiple processing chambers
Solution Approach 1:
The patent combines deposition and etching processes that were previously performed in separate processing chambers into a single integrated chamber. This merging reduces the number of chambers needed while maintaining the self-aligned multiple patterning capability, thereby simplifying process control and reducing costs without compromising sub-100 nm pattern resolution
Solution Approach 2:
The processing chamber is designed to perform multiple functions - both deposition and etching operations - within a single chamber environment. This multi-functionality eliminates the need for separate specialized chambers, reducing overall system complexity while enabling the complete self-aligned multiple patterning workflow
2Manufacturing precision
If spacer structures are formed by deposition followed by etching in different chambers, then manufacturing precision is improved, but loss of time increases due to multiple chamber transitions
Solution Approach 1:
The patent merges the deposition and etching steps into a single continuous process within one chamber, eliminating the time-consuming chamber transition and intermediate handling steps while preserving the precision of spacer structure formation through controlled sequential operations
3Manufacturing precision
If original array structures are removed to leave only spacers, then manufacturing precision is improved, but object-generated harmful factors increase due to underlying material attack
Solution Approach 1:
The patent converts the potentially harmful etching process into a beneficial selective removal process by using carefully controlled etching conditions that remove the original array structures while preserving the underlying material. The etching is performed in a way that the spacer structures serve as protective masks, and the process parameters are optimized to prevent excessive attack on the substrate
Solution Approach 2:
The patent employs precise control of etching parameters (such as etchant composition, temperature, pressure, and duration) to achieve selective removal of the original structures without damaging the underlying material. By adjusting these parameters, the process distinguishes between what should be removed and what should be preserved
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves improved process control, reduces defects, and enables the formation of uniform nanostructures with reduced strain, allowing for sustainable and economical scaling of electronic and optical devices.
Implementation Method 1
The spacer structures are typically formed by deposition of a film on an existing pattern
Implementation Method 2
by etching to remove all the film material on the horizontal surfaces
Data Source
AI summary
A method for forming an array of nanostructures is presented. The method comprising: providing a layer structure including an array of first sacrificial nanostructures arranged on a supporting layer structure comprising at least a first material layer and a substrate; selectively applying spacer structures on sidewalls of the array of first sacrificial nanostructures; selectively etching away the array of first sacrificial nanostructures such that the spacer structures form an array of second sacrificial nanostructures; etching the first material layer using the array of second sacrificial nanostructures as an etching mask; and removing the array of second sacrificial nanostructures thereby exposing an array of nanostructures formed from the first material layer