Nanostructure Gate Oxide Profile for Corner Field Breakdown
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Solution Overview
Problem
As semiconductor devices continue to shrink in feature size, the integration density of electronic components increases, but this leads to challenges such as dielectric breakdown at the corners of gate oxides in nanostructure transistors, where the electrical field is high and prone to failure.
Innovation Solution
The formation of gate oxides with thicker vertical portions on the sidewalls and corner portions compared to horizontal portions on the top and bottom surfaces, achieved through processes like Plasma Enhanced Atomic Layer Deposition, remote plasma oxidation, or thermal oxidation, reduces the electrical field at these vulnerable areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the gate oxide thickness is reduced uniformly to increase integration density, then more transistors can be integrated into a given area, but dielectric breakdown occurs at the corners where the electrical field is concentrated
Solution Approach 1:
The gate oxide structure transitions from uniform thickness to non-uniform thickness, where corner regions have increased oxide thickness compared to the bulk regions. This local variation in quality (thickness) allows the corner areas, which experience higher electrical field stress, to have enhanced dielectric strength while maintaining thinner oxide in other areas for higher integration density.
Solution Approach 2:
The gate oxide structure introduces asymmetry in thickness distribution, with thicker oxide specifically at the corner regions and thinner oxide in the horizontal portions. This asymmetric design addresses the non-uniform electrical field distribution, where corners experience higher field concentration, by providing additional dielectric protection precisely where needed.
2Reliability
If the gate oxide thickness is increased to prevent dielectric breakdown, then reliability improves, but the device area increases reducing integration density
Solution Approach 1:
Instead of uniformly increasing gate oxide thickness across the entire structure, the invention applies increased thickness locally only at the corner regions where dielectric breakdown is most likely to occur. This selective approach provides the necessary reliability improvement while minimizing the overall area increase, thereby maintaining high integration density.
Solution Approach 2:
The invention applies the 'excessive action' principle by providing more than the minimum required oxide thickness, but only in the specific corner regions where it is most needed for preventing breakdown. This partial application of excessive thickness avoids the area penalty of uniform thickness increase while still providing adequate protection.
3Ease of manufacture
If conventional oxidation processes are used, then the manufacturing process is simple, but the gate oxide has uniform thickness that concentrates electrical field at corners causing breakdown
Solution Approach 1:
The invention modifies the oxidation process parameters, specifically introducing a plasma treatment step before or during oxidation that alters the oxidation rate. This parameter change causes the oxidation to proceed at different rates in different regions, resulting in thicker oxide formation at corner regions compared to horizontal portions, thereby addressing the electrical field concentration issue.
Solution Approach 2:
The invention employs plasma-enhanced oxidation or remote plasma treatment that creates a more aggressive oxidation environment. This accelerated oxidation process, when applied under specific conditions, results in preferential oxide growth at corner regions, creating the desired non-uniform thickness profile that improves electrical field distribution and prevents breakdown.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the likelihood of dielectric breakdown and enhances the reliability of nanostructure transistors by distributing the electrical field more evenly, thereby improving their performance and longevity.
Implementation Method 1
oxidizing is performed using a plasma enhanced atomic layer deposition process
Implementation Method 2
oxidizing is performed using remote plasma oxidation process
Implementation Method 3
oxidizing is performed using remote plasma oxidation process
Implementation Method 4
oxidizing is performed using a thermal oxidation process
Implementation Method 5
oxidizing is performed using a thermal oxidation process
Data Source
AI summary
A device includes a semiconductor nanostructure, and an oxide layer, which includes horizontal portions on a top surface and a bottom surface of the semiconductor nanostructure, vertical portions on sidewalls of the semiconductor nanostructure, and corner portions on corners of the semiconductor nanostructure. The horizontal portions have a first thickness. The vertical portions have a second thickness. The corner portions have a third thickness. Both of the second thickness and the third thickness are greater than the first thickness. A high-k dielectric layer surrounds the oxide layer. A gate electrode surrounds the high-k dielectric layer.


