Semiconductor Nanostructure Hard Mask Removal Without Over-Etching
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Solution Overview
Problem
In the manufacturing of semiconductor devices, particularly gate-all-around (GAA) FETs, the challenge lies in efficiently removing hard mask layers without damaging the underlying silicon-based structures, which can lead to reduced efficiency, failure, and resource wastage due to over-etching or incomplete etching.
Innovation Solution
The method involves forming a nanostructure with alternating silicon-based layers, depositing a first and second hard mask layer, and a cladding structure. By removing a top portion of the cladding structure before the second hard mask layer, the method reduces residual material and over-etching, thereby increasing the process window and reducing defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etching is performed to remove hard mask layers, then the hard mask is removed, but over-etching may damage the underlying silicon-based structure
Solution Approach 1:
The patent divides the single etching process into two distinct stages: a first etching process that removes the second hard mask layer, and a second etching process that removes the first hard mask layer. This segmentation allows each etching step to be independently controlled and optimized, preventing over-etching damage to the silicon-based structure while ensuring complete removal of hard mask materials.
Solution Approach 2:
The patent performs preliminary actions by forming a cladding structure on the sidewalls before the etching processes. This cladding structure serves as a protective barrier that prevents etchant from reaching and damaging the silicon-based structure during the hard mask removal process, thereby enabling safe and complete etching without compromising device reliability.
2Manufacturing precision
If etching time is extended to remove all hard mask, then complete removal is achieved, but silicon-based structure is damaged
Solution Approach 1:
The etching process is segmented into two distinct operations: first etching the second hard mask layer, then etching the first hard mask layer. This eliminates the need for extended single-stage etching that would cause damage, while still achieving complete hard mask removal through controlled sequential processing.
Solution Approach 2:
The cladding structure is formed in advance on the sidewalls to provide protective coverage during both etching operations. This preliminary protective action enables complete removal of hard mask layers without exposing the silicon-based structure to harmful over-etching conditions.
3Reliability
If etching time is reduced to protect silicon structure, then device integrity is maintained, but hard mask removal is incomplete
Solution Approach 1:
By segmenting the etching process into two controlled stages, each targeting a specific hard mask layer, the patent achieves complete removal of all hard mask materials while maintaining device integrity. Each stage is optimized for its specific purpose, eliminating the trade-off between completeness and safety.
Solution Approach 2:
The cladding structure is formed preliminarily to protect the silicon-based structure during both etching operations. This enables the first etching process to completely remove the second hard mask layer and the second etching process to completely remove the first hard mask layer, achieving full removal completeness while maintaining device integrity throughout.
4Device complexity
If single-layer hard mask is used, then process complexity is reduced, but etching control precision is insufficient
Solution Approach 1:
The patent uses a two-layer hard mask structure (first and second hard mask layers) that is segmented into distinct functional zones. This segmentation enables differential etching control, where each layer can be removed with optimized parameters, achieving superior etching control precision compared to a single-layer approach despite the increased structural complexity.
Data Source
AI summary
Implementations described herein provide a method of forming a semiconductor device. The method includes forming a nanostructure having a first set of layers of a first material and a second set of layers, alternating with the first set of layers, having a second material. The method further includes depositing a hard mask on a top layer of the first set of layers, the hard mask including a first hard mask layer on the top layer of the first set of layers and a second hard mask layer on the first hard mask layer. The method also includes depositing elements of a cladding structure on sidewalls of the nanostructure and the hard mask. The method further includes removing a top portion of the cladding structure. The method further includes removing the second hard mask layer after removing the top portion of the cladding structure.