Nanostructure Interposer Energy Storage for On-Package Decoupling
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Solution Overview
Problem
Existing interposer assembly technologies face limitations in integrating decoupling capacitors and local energy storage without increasing footprint, incurring high costs, and are limited by parasitic resistances and processing complexity, which affect the performance of high-speed, low-power integrated circuits.
Innovation Solution
An interposer device incorporating nanostructure energy storage devices, such as nanostructure capacitors or batteries, is used to provide local energy storage and decoupling without modifying the integrated circuit, utilizing conductive nanostructures and conduction controlling materials like high-k dielectrics or solid electrolytes, allowing for efficient energy storage and capacitive functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional energy storage devices are used in electronic devices, then energy storage capacity is limited, but device size and weight increase
Solution Approach 1:
The energy storage device is integrated within the interposer structure, nesting the energy storage function inside the existing interposer footprint. The interposer contains conductive layers, dielectric layers, and energy storage elements in a stacked configuration, allowing the energy storage device to occupy space that would otherwise be unused or minimally utilized in the package substrate architecture.
Solution Approach 2:
The patent transitions from planar energy storage to three-dimensional stacked architecture. Multiple conductive layers and dielectric layers are arranged vertically within the interposer, creating a multi-layer capacitor structure that increases energy storage capacity without increasing the lateral footprint. This vertical stacking enables higher energy density within the same package area.
2Volume of moving object
If energy storage device size is reduced for smaller electronic devices, then manufacturing precision requirements increase
Solution Approach 1:
The energy storage device is divided into multiple discrete layers including conductive layers, dielectric layers, and interface structures. Each layer can be formed using standard semiconductor fabrication processes, allowing precise control of thickness and composition. The segmented layered structure enables modular manufacturing with well-established process control techniques.
Solution Approach 2:
The interposer structure serves multiple functions simultaneously: it provides electrical interconnection between package substrates and contains the energy storage device. The conductive layers and dielectric layers of the energy storage device are integrated with the interposer's routing and signaling structures, eliminating the need for separate energy storage device fabrication processes.
3Quantity of substance
If energy storage capacity is increased, then device complexity increases
Solution Approach 1:
The energy storage device is merged with the interposer structure, combining two previously separate components into a single integrated unit. The interposer's conductive layers and dielectric layers are simultaneously used for both signal routing and energy storage functions, reducing the total component count and simplifying the overall package architecture.
Solution Approach 2:
The interposer structure performs dual functions as both an electrical interconnection element and an energy storage device. The same conductive and dielectric layers that provide signal pathways also form the capacitor structures, allowing one component to fulfill multiple roles and thereby reducing system complexity despite increased energy storage capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The interposer device enables cost-effective, compact energy storage and decoupling, enhancing circuit performance by reducing parasitic resistances and providing freedom in design and processing, while maintaining a small form factor.
Implementation Method 1
a first plate and a second plate of the nanostructure energy storage device may be formed concurrently with a first conductive layer and a second conductive layer of the interposer, respectively
Data Source
Figure 1
Figure 2A~2B
Figure 3
AI summary
An interposer device comprising an interposer substrate;a plurality of conducting vias extending through the interposer substrate;a conductor pattern on the interposer substrate, and a nanostructure energy storage device. The nanostructure energy storage device comprises at least a first plurality of conductive nanostructures formed on the interposer substrate;a conduction controlling material embedding each nanostructure in the first plurality of conductive nanostructures;a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material,wherein the first electrode and the second electrode are configured to allow electrical connection of the nanostructure energy storage device to the integrated circuit.