Layered Source/Drain Epitaxy for Low-Resistance Nanostructures
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Solution Overview
Problem
As semiconductor devices continue to shrink in size, the integration density of electronic components increases, leading to challenges such as increased resistance in source/drain regions, which affects device performance.
Innovation Solution
Epitaxially growing seed layers for source/drain regions with semiconductor materials that allow for lower bottom-up growth rates, increasing the volume available for highly-doped epitaxial layers and reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but resistance in source/drain regions increases and device performance deteriorates
Solution Approach 1:
The source/drain region is segmented into multiple epitaxial layers with different doping concentrations. The lower epitaxial layer has lower doping concentration while the upper epitaxial layer has higher doping concentration, allowing the structure to simultaneously achieve low resistance (through the highly-doped upper layer) and controlled growth characteristics (through the lightly-doped lower layer).
Solution Approach 2:
Different regions of the source/drain structure are given different doping concentrations to optimize local properties. The lower epitaxial layer uses lower doping concentration to control growth rate and reduce defects, while the upper epitaxial layer uses higher doping concentration to reduce resistance, creating local quality variations that solve the overall contradiction.
2Productivity
If epitaxial growth rate is increased to improve manufacturing efficiency, then production speed increases, but the volume available for highly-doped epitaxial layers decreases and resistance increases
Solution Approach 1:
The epitaxial growth process is segmented into multiple stages with different growth rates and doping concentrations. The lower epitaxial layer is grown with a controlled, lower growth rate to ensure sufficient volume, while the upper epitaxial layer is grown with optimized parameters to achieve high doping concentration and low resistance, resolving the contradiction between speed and precision.
Solution Approach 2:
The growth parameters (temperature, pressure, doping concentration, growth rate) are changed between different epitaxial layers. By adjusting these parameters, the lower layer is grown with conditions that ensure adequate volume, while the upper layer is grown with conditions that maximize doping concentration, thereby controlling both volume and resistance independently.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach decreases the resistance of the epitaxial source/drain regions, thereby improving the performance of semiconductor devices like nano-FETs, finFETs, and planar transistors.
Implementation Method 1
growing a first epitaxial layer on a sidewall of the nanostructure, the first epitaxial layer including a germanium-free semiconductor material and a p-type dopant
Data Source
AI summary
In an embodiment, a device includes: a nanostructure; and a source/drain region adjoining a channel region of the nanostructure, the source/drain region including: a first epitaxial layer on a sidewall of the nanostructure, the first epitaxial layer including a germanium-free semiconductor material and a p-type dopant; a second epitaxial layer on the first epitaxial layer, the second epitaxial layer including a germanium-containing semiconductor material and the p-type dopant; and a third epitaxial layer on the second epitaxial layer, the third epitaxial layer including the germanium-containing semiconductor material and the p-type dopant.