Nanowire FET Doping via Segmented Epitaxial Growth
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Solution Overview
Problem
Current techniques for fabricating nanowire field-effect transistors (FETs) face challenges such as difficulty in in-situ doping, variations in doping profiles, nanowire tapering, loss of catalyst material, and alignment issues with contacts and gates, particularly in thin nanowires, which affect the control and efficiency of doping and contact resistance.
Innovation Solution
The development of a field-effect transistor with a nanowire channel using a silicon-on-insulator (SOI) layer, where the SOI layer is divided into source and drain regions, and an epitaxial semiconductor material is grown to attach and connect the nanowire to these regions, with a gate over the channel region, allowing for improved doping control and reduced contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If in-situ doping of nanowires during growth is used, then doping can be achieved, but doping profile control is poor and nanowire tapering occurs
Solution Approach 1:
The patent divides the nanowire structure into distinct segments: an undoped single-crystal nanowire channel region and separately formed epitaxial source and drain regions. This segmentation allows the channel to maintain its pristine single-crystal structure while the source/drain regions provide the necessary doping, eliminating the tapering problem caused by in-situ doping during nanowire growth.
Solution Approach 2:
The patent forms the doped epitaxial source and drain regions before final nanowire attachment, preparing the doping structure in advance. This preliminary action allows precise control over the doping profile in the source/drain regions without affecting the nanowire channel morphology, as the nanowire is attached to pre-formed doped regions rather than being doped during its growth.
2Manufacturing precision
If ion implantation is used for doping, then doping can be achieved, but nanowire amorphization and sputtering occur in thin nanowires
Solution Approach 1:
The patent uses epitaxial growth as an intermediary process to form doped source and drain regions. Instead of directly implanting ions into the thin nanowire (which causes amorphization and sputtering), the doping is achieved through epitaxial growth of doped semiconductor material that templates from the nanowire, providing a gentler doping mechanism that preserves nanowire structural integrity.
Solution Approach 2:
The patent changes the doping approach from high-energy ion implantation to low-energy epitaxial growth with in-situ doping. This parameter change in the doping method allows doping to occur without the damaging effects of ion implantation, maintaining the single-crystal structure and structural integrity of thin nanowires while achieving the required doping profiles.
3Manufacturing precision
If non-selective UHV-CVD epitaxy is used to thicken source/drain regions, then epitaxial contacts can be formed, but excess Si bridges source and drain regions and poly-Si forms with higher resistivity
Solution Approach 1:
The patent applies selective epitaxial growth that occurs only in specific locations - on the nanowire surface and at the source/drain regions. This local quality control prevents excess Si deposition that would bridge the source and drain regions, as the epitaxial growth is confined to areas where the nanowire templates the growth, avoiding unwanted poly-Si formation and maintaining proper electrical isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables more precise control over the doping profile and reduces contact resistance, enhancing the performance and efficiency of nanowire FETs by ensuring uniform and effective attachment of the nanowire to the source and drain regions, thereby improving the overall electrical characteristics.
Implementation Method 1
an epitaxial semiconductor material, grown from the SOI layer, covering the nanowire and attaching the nanowire to each section of the SOI layer
Data Source
AI summary
Field-effect transistors (FETs) having nanowire channels are provided. In one aspect, a FET is provided. The FET comprises a substrate having a silicon-on-insulator (SOI) layer which is divided into at least two sections electrically isolated from one another, one section included in a source region and the other section included in a drain region; a channel region connecting the source region and the drain region and including at least one nanowire; an epitaxial semiconductor material, grown from the SOI layer, covering the nanowire and attaching the nanowire to each section of the SOI layer; and a gate over the channel region.