Nanowire Optoelectronic Device Peripheral Contact
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Solution Overview
Problem
Conventional optoelectronic devices using III-N semiconductor materials face challenges in achieving good crystalline quality due to lattice parameter and defect density issues, leading to significant light loss within the material, and the presence of a semi-transparent conductive layer compromises light extraction and conductivity.
Innovation Solution
The method involves producing nanowires with a waveguide structure on substrates with differing lattice parameters, eliminating the need for a semi-transparent conductive layer by creating electrical contact zones on the periphery and end of the nanowires, allowing for direct contact and reducing light absorption, and using a planarizing material to fill interstices while ensuring electrical continuity through doping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a semi-transparent conductive layer is deposited to cover the nanowire surface for electrical contact, then electrical conductivity is improved, but light extraction efficiency deteriorates due to light absorption
Solution Approach 1:
The patent transitions from planar contact geometry to three-dimensional peripheral contact by depositing conductive material around the nanowire circumference. This dimensional change allows electrical contact without requiring a surface-covering layer that would absorb light, resolving the contradiction between conductivity and light extraction.
Solution Approach 2:
The conductive material is applied locally only to the peripheral regions of the nanowire where electrical contact is needed, rather than covering the entire surface. This localized application maintains light extraction efficiency from the central emission region while providing necessary electrical conductivity at the contacts.
2Ease of manufacture
If conventional planar layers are grown on substrates with mismatched lattice parameters, then manufacturing is simplified, but crystalline quality deteriorates due to high defect density
Solution Approach 1:
The patent segments the semiconductor structure into individual nanowires grown on a substrate, rather than attempting to form continuous planar layers. This segmentation allows each nanowire to tolerate substrate lattice mismatch without propagating defects across a continuous layer, enabling growth on substrates with different lattice parameters while maintaining high crystalline quality.
Solution Approach 2:
The invention transitions from two-dimensional planar layer growth to one-dimensional nanowire growth. This dimensional change fundamentally alters how lattice mismatch is handled, allowing nanowires to accommodate substrate mismatch through their cylindrical geometry and discrete structure, thereby maintaining high crystalline quality on substrates that would be unsuitable for planar growth.
3Loss of energy
If the nanowire transverse dimension is reduced to nanometric size for waveguide properties, then light extraction is improved, but the area for electrical contact is reduced
Solution Approach 1:
The patent moves electrical contact from the top surface (two-dimensional contact) to the peripheral side walls (one-dimensional circumferential contact). This dimensional shift allows adequate contact area to be achieved around the nanowire circumference even when the top surface area is minimized for optimal light extraction.
Solution Approach 2:
The nanowire's cylindrical geometry provides curved peripheral surfaces that can accommodate conductive contact material around its entire circumference. This curvature-based geometry maximizes the available contact area in the lateral direction, compensating for the reduced top surface area while maintaining efficient light extraction from the nanowire apex.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances light extraction efficiency by minimizing light loss and reducing contact resistance, enabling optoelectronic devices to operate at lower voltages or consume less power while maintaining high light emission efficiency.
Implementation Method 1
Given its quasi-cylindrical shape, its size and its refractive index (greater than the ambient medium), the guiding of the light is carried out substantially parallel to the axis of growth of the nanowires. The light thus arrives at the end of the nanowires with a small angle with respect to the axis of the latter, that is to say an angle less than the limit angle of total reflection, which facilitates the exit of the light.
Implementation Method 2
When nanowires are designed to emit light and not just guide it, they feature a pn junction.
Data Source
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AI summary
The invention relates to a method for making optoelectronic devices comprising nanowire semiconductors, in which: the nanowires (2) are formed on a substrate (1), said nanowires being capable of emitting a light beam; a first electric contact area is formed at the substrate, and a second electric contact area is formed at the nanowires, characterised in that the second electric contact area is formed on the edge of the nanowires (2) in direct contact with said nanowires, on a predetermined height (h) thereof and in the vicinity of their end opposite the substrate, as well as between said nanowires, the upper surface (20) of the nanowires being exposed.