Nanowire Fabrication via Selective Area Growth
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Solution Overview
Problem
Conventional planar MOSFET devices face challenges in further reducing geometry size, leading to the exploration of non-planar devices like Fin FETs and vertical FETs, which while adequate, are not entirely satisfactory in all aspects.
Innovation Solution
A method for fabricating nanowire-based devices with ultrathin diameters, involving a series of steps including substrate preparation, nanowire growth, oxidation, and digital etching to achieve precise dimensions, suitable for use in non-planar devices such as vertical FETs, utilizing techniques like selective area growth metal organic chemical vapor deposition (SAG-MOCVD) and digital etching to form nanowires with reduced diameters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional etching processes are used to reduce nanowire diameter, then geometry size is decreased, but surface damage and defects are introduced
Solution Approach 1:
The patent extracts the harmful etching step from the nanowire fabrication process by using selective area growth to directly form nanowires of the desired diameter through controlled deposition, eliminating the need for subsequent etching that causes surface damage
Solution Approach 2:
The patent performs preliminary action by controlling the nanowire growth diameter from the beginning through selective area growth parameters, rather than attempting to reduce the diameter later through etching, thus preventing surface damage before it can occur
2Speed
If nanowire diameter is reduced to improve device performance, then switching speed increases, but manufacturing precision becomes more difficult to achieve
Solution Approach 1:
The patent employs feedback control during the selective area growth process by monitoring growth conditions and adjusting parameters in real-time to maintain precise nanowire diameter control, ensuring consistent ultra-thin dimensions without compromising manufacturing precision
Solution Approach 2:
The patent achieves precise nanowire diameter control by carefully changing and optimizing growth parameters such as temperature, pressure, and precursor flow rates during selective area growth, enabling accurate control of ultra-thin nanowire dimensions
3Ease of manufacture
If conventional fabrication methods are used, then manufacturing process is simpler, but device performance is insufficient
Solution Approach 1:
The patent introduces selective area growth as an intermediary process that bridges the gap between simple fabrication and high performance by providing a controlled deposition method that achieves superior nanowire quality without requiring complex multi-step processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enables the formation of nanowire-based devices with improved performance characteristics, such as higher switching speed, lower leakage current, and reduced contact resistance, by avoiding surface damage from etching processes and achieving defect-free surfaces.
Implementation Method 1
growing a nanowire that protrudes through the opening in the mask layer, wherein the nanowire has a diameter that is less than about 10 nanometers
Implementation Method 2
oxidizing a surface of the nanowire
Data Source
AI summary
Provided is a method of forming a nanowire-based device. The method includes forming a first mask layer over a substrate; forming a first opening in the first mask layer; growing a first nanowire that protrudes through the first opening in the first mask layer, wherein the first nanowire has a first diameter; removing the first mask layer; oxidizing a sidewall of the first nanowire; etching the oxidized sidewall of the first nanowire; forming a second mask layer overlaying the substrate; removing the first nanowire thereby forming a second opening in the second mask layer; and growing a second nanowire that protrudes through the second opening in the second mask layer, wherein the second nanowire has a second diameter and the second diameter is different than the first diameter.