Nanowire SiGe Gate Structure With Relaxed Ge Gradient
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Solution Overview
Problem
Existing methods for forming SiGe hetero-structures in semiconductor devices face issues with impurity defects and strain due to high germanium concentration, leading to dislocation problems, which affect transistor performance.
Innovation Solution
A method involving the formation of an amorphous Ge layer on a Si layer, followed by annealing to allow germanium atoms to diffuse into silicon, creating a single crystalline strain-relaxed SiGe structure with controlled germanium concentration, reducing impurity defects and dislocations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high germanium concentration is used to enhance hole mobility in SiGe, then transistor performance is improved, but impurity defects and dislocation increase
Solution Approach 1:
The patent applies parameter changes by controlling the germanium concentration gradient through a two-stage annealing process. The first annealing stage at lower temperature (600-800°C) and the second stage at higher temperature (800-1000°C) enable precise control of Ge diffusion, maintaining optimal Ge concentration for hole mobility while preventing excessive concentration that would cause defects and dislocation.
Solution Approach 2:
The patent employs preliminary action by forming an amorphous Ge layer on the Si layer before annealing. This pre-formed Ge layer serves as a controlled source of germanium atoms that will diffuse into the Si during subsequent annealing stages, enabling gradual and uniform concentration distribution that avoids sudden defect formation.
2Reliability
If strain-induced band structure modification is used to increase drive current, then transistor performance is improved, but strain relaxation causes dislocation
Solution Approach 1:
The patent maintains beneficial strain for drive current enhancement while preventing dislocation through controlled Ge concentration gradients. The two-stage annealing process creates an optimal Ge distribution that sustains strain-induced band structure modification without exceeding the strain relaxation threshold that would cause dislocation.
Solution Approach 2:
The patent applies local quality by creating a non-uniform Ge concentration distribution within the SiGe layer. The Ge concentration varies through the layer thickness, with higher concentration near the interface providing strain for improved mobility, while lower concentration in other regions prevents strain relaxation and dislocation formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method produces a SiGe structure with improved mobility and reduced defects, enhancing transistor performance by integrating it into various transistor architectures such as planar and non-planar devices, including FinFET and GAA architectures.
Implementation Method 1
annealing to allow germanium atoms to diffuse into silicon
Implementation Method 2
annealing to allow germanium atoms to diffuse into silicon
Implementation Method 3
creating a single crystalline strain-relaxed SiGe structure
Data Source
AI summary
A semiconductor structure includes a nanowire, a gate structure surrounding a first section of the nanowire and exposing second sections of the nanowire, and a semiconductor layer between the gate structure and the first section of the nanowire. The nanowire includes a first semiconductor material and a second semiconductor material. A lattice constant of the second semiconductor material is greater than a lattice constant of the first semiconductor material. The semiconductor layer includes the second semiconductor material. A concentration of the second semiconductor material in the semiconductor layer is different from a concentration of the second semiconductor material in the nanowire.