Nanowire Active Layer Placement in Thin Film Transistor Substrates
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Solution Overview
Problem
The yield of thin film transistor substrates is decreased due to misalignment and patterning defects when forming the active layer using nanowires, as they are randomly scattered and not correctly placed on the substrate, leading to wasted nanowires and inefficient use of the substrate.
Innovation Solution
A method is developed where a groove is formed in the gate insulating film corresponding to the area where the active layer is to be formed, and the nanowire is precisely placed within this groove using an inkjet, ensuring accurate placement and alignment, thereby reducing patterning defects and improving yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If nanowires are randomly scattered on the substrate to form the active layer, then the formation process is simple, but the alignment precision and placement accuracy deteriorate, leading to misalignment and patterning defects
Solution Approach 1:
The gate insulating film is formed with a groove structure in advance at the precise location where the active layer is to be formed. This preliminary preparation of the groove structure enables the nanowire to be automatically guided and positioned correctly during the subsequent formation process, thereby improving placement accuracy without significantly complicating the overall manufacturing process
Solution Approach 2:
The groove structure in the gate insulating film serves as an intermediary element that mediates between the randomly scattered nanowires and the desired active layer position. The groove physically guides and constrains the nanowire placement, transforming the random scattering process into a controlled positioning mechanism, thus achieving both process simplicity and placement accuracy
2Productivity
If nanowires are randomly scattered on the substrate, then the formation process is fast, but the yield of thin film transistor substrates deteriorates due to misalignment and patterning defects
Solution Approach 1:
The groove is pre-formed in the gate insulating film before nanowire deposition. This preliminary action ensures that when nanowires are scattered, they are automatically guided into the correct positions by the groove structure, maintaining fast formation speed while significantly improving substrate yield by preventing misalignment and patterning defects
Solution Approach 2:
The groove structure acts as an intermediary that reconciles the conflict between fast random scattering and high yield. It allows the rapid scattering process to continue while simultaneously ensuring correct nanowire positioning, thus maintaining productivity while improving reliability and substrate yield
3Stability of the object's composition
If nanowires are scattered at arbitrary locations, then the distribution is uniform, but the alignment with gate electrode deteriorates, causing wasted nanowires and inefficient substrate use
Solution Approach 1:
The groove in the gate insulating film serves as a mediating structure that receives and guides the uniformly distributed nanowires. It transforms the uniform but misaligned scattering pattern into a precisely aligned active layer by physically constraining nanowire positions within the groove, thus maintaining distribution uniformity while achieving alignment accuracy
Solution Approach 2:
The groove structure introduces local structural variation in the gate insulating film precisely where the active layer is needed. This local modification creates a preferential site for nanowire placement, ensuring that nanowires are concentrated and aligned at the correct location while maintaining uniform distribution elsewhere, thereby improving alignment without compromising overall distribution
Data Source
AI summary
A thin film transistor substrate and its fabrication method are discussed. According to an embodiment, the fabricating method of a thin film transistor substrate includes forming a gate electrode on a substrate; forming a gate insulating film on the gate electrode, the gate insulating film having a groove in an area corresponding to an area where an active layer of a thin film transistor is to be formed; forming the active layer of the thin film transistor by use of a nanowire in the groove of the gate insulating film; and forming a source electrode and a drain electrode on the active layer.