Narrow Border Display Panel Circuit Integration
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Solution Overview
Problem
The existing display panel designs face a challenge in accommodating the array test circuit and cell test circuit due to insufficient space as the border of mobile devices narrows, necessitating a solution to integrate these circuits effectively within a reduced footprint.
Innovation Solution
The proposed solution involves a narrow border display panel configuration where an array test unit with multiple array test switches and pads is positioned between the pixel unit and the cell test unit, with the array test switches coupled to data lines of the pixel unit and cell test switches connected to the array test switches, allowing for efficient space utilization and reduced width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the driving integrated circuit size is reduced to narrow the border, then the border width is reduced, but the space for placing array test circuit and cell test circuit becomes insufficient
Solution Approach 1:
The patent integrates the array test circuit and cell test circuit into the same polyimide substrate layer as the driving integrated circuit, utilizing the planar two-dimensional space of the substrate. This allows test circuits to be placed in previously unused areas of the substrate, effectively using the available space without increasing the overall border width.
Solution Approach 2:
The patent combines the array test circuit and cell test circuit into a single integrated structure on the polyimide substrate, sharing common elements such as test signal lines and control circuits. This merging reduces the total space required for test functions while maintaining all necessary testing capabilities.
2Device complexity
If the driving integrated circuit is mounted on polyimide substrate with test circuits placed directly between input and output circuits, then the structure is simple, but the border cannot be narrowed due to insufficient space
Solution Approach 1:
The patent segments the test circuit functions into distinct modules: array test circuit, cell test circuit, and shared control circuits. These segmented modules are strategically placed in different regions of the polyimide substrate, allowing efficient space utilization while maintaining structural simplicity and reducing border width.
Data Source
AI summary
Provided is a lower narrow border display panel, including a pixel unit, an array test unit and a cell test unit. By combining the array test circuit and the cell test circuit while ensuring the measurement, the space originally occupied by the array test circuit and the unit test circuit can be reduced, thereby narrowing the width of the lower border of the display panel.