NBTI Stress Test Circuit Isolating Threshold Voltage Shift

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Solution Overview

Problem

Current methods for evaluating Negative Bias Thermal Instability (NBTI) in CMOS transistors are inaccurate due to partial recovery of threshold voltage and saturation current changes, requiring precise timing between stress and measurement phases to model NBTI effectively.

Innovation Solution

A test circuit with a sensor circuit and complementary control logic that powers down during the stress phase to isolate NBTI, ensuring zero voltage between the source and drain, preventing Hot Carrier Injection degradation, and powers up during evaluation to measure accurate changes in threshold voltage and saturation current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If standard bench tester is used for NBTI evaluation, then device complexity is reduced, but measurement precision deteriorates due to partial recovery of threshold voltage and saturation current

Engineering Contradiction:
ImproveNBTI degradation measurement accuracyVSAvoidtest circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The test circuit is divided into distinct functional modules: a transistor under evaluation, a sensor circuit, and complementary control circuitry. This segmentation allows independent optimization of each component's function, enabling precise measurement of NBTI effects while managing overall system complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A sensor circuit acts as an intermediary between the transistor under evaluation and the measurement system. The sensor circuit, powered down during stress and powered up during evaluation, mediates the measurement process to capture accurate NBTI degradation data without introducing additional degradation phenomena.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If stress voltage is applied to evaluate NBTI, then measurement of threshold voltage change is enabled, but Hot Carrier Injection degradation occurs

Engineering Contradiction:
Improvethreshold voltage change measurementVSAvoidHot Carrier Injection degradation
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The control circuitry is configured to prevent Hot Carrier Injection by maintaining zero voltage between source and drain during the stress phase. This preliminary protective action eliminates the harmful effect before it can occur, allowing accurate NBTI measurement without contamination from HCI degradation.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The control circuitry converts the potentially harmful stress condition into a beneficial measurement opportunity by ensuring zero voltage across source-drain during stress. This transforms what would be a degradation-prone condition into a controlled environment for isolating and measuring pure NBTI effects.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Loss of time

If measurement is taken immediately after stress phase, then time loss is minimized, but measurement precision deteriorates due to partial recovery of transistor parameters

Engineering Contradiction:
Improvetime between stress and measurementVSAvoidthreshold voltage and saturation current measurement
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The test circuit employs periodic action by cycling through stress and evaluation phases. During the evaluation phase, the sensor circuit is powered up to measure transistor parameters immediately after stress, capturing the state before significant recovery occurs. This periodic stress-measure-stress-measure approach minimizes time loss while maintaining measurement precision.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The sensor circuit is prepared and powered up during the evaluation phase before the actual measurement is taken. This preliminary preparation ensures that the measurement system is ready to capture transistor parameter changes immediately after stress, minimizing the time delay while maintaining accurate measurements of the transient state.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for flexible and accurate measurement of NBTI-induced degradation, providing more precise data for circuit simulation and design optimization by minimizing interference from other degradation phenomena.

Implementation Method 1

Voltage is transmitted from the source to the drain when the transistor is on, which is controlled via a voltage applied to the gate

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

elevated electric fields between the gate of the transistor and its drain, known as hot carrier injection (HCI) resulting in a permanent shift in threshold voltage

Methodology Applied
Scientific EffectHot carrier injection:

Implementation Method 3

The NBTI phenomenon is a partially reversible process. This means that when the applied source-to-gate bias is removed, the transistor is capable of recovering part of the change in threshold voltage and in saturation current brought about by the applied bias

Methodology Applied
Scientific EffectPartial recovery:

Data Source

PatentUS9817059B2Evaluation of thermal instability stress testing
Publication Date: 2017.11.14 SYNOPSYS INC
  • US9817059B2 patent drawing
  • US9817059B2 patent drawing
  • US9817059B2 patent drawing

AI summary

A circuit is powered through a transistor whose thermal instability behavior is to be evaluated in a stress test. The transistor is stressed during a stress phase of the stress test with a sensor circuit powered off and the Vds of the transistor is zero. The sensor circuit is powered on through the transistor during an evaluate phase of the stress test.