Numerical Control Device Serial Interface Segmentation

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Solution Overview

Problem

Conventional numerical control devices experience performance degradation due to communication bottlenecks in bus-based systems, limiting the increase in communication traffic for servo control and I/O data, which hampers the overall performance of controlled objects like machines or robots.

Innovation Solution

A numerical control device configuration featuring a multicore CPU connected to an integrated circuit (ASIC) through multiple high-speed serial interfaces, with separate internal buses for the servo controller and another processor, allowing independent management of communication traffic and preventing performance degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single parallel bus system is used to connect CPU, DSP, and ASIC components, then device complexity is reduced and manufacturing is simplified, but communication bandwidth is limited and servo control performance deteriorates

Engineering Contradiction:
Improvecommunication system complexityVSAvoidservo control performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The single parallel bus system is segmented into multiple independent serial interfaces (first serial interface, second serial interface, third serial interface). Each interface handles specific communication tasks: servo control data, I/O data, and other data respectively. This segmentation eliminates communication bottlenecks and allows simultaneous high-speed data transmission without interference, resolving the contradiction between simplified complexity and degraded performance.

Inventive Principle:
Principle #1Segmentation

2Productivity

If communication traffic for servo control and I/O data is increased to improve control performance, then responsiveness to controlled objects improves, but communication bottlenecks cause performance degradation

Engineering Contradiction:
Improvecontrol responsivenessVSAvoidcommunication performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Communication traffic is segmented across three independent serial interfaces. The first serial interface is dedicated to servo control data, the second to I/O data, and the third to other data. This allows each interface to handle its specific traffic load without interfering with others, enabling increased overall communication capacity while maintaining reliable servo control performance even under high load conditions.

Inventive Principle:
Principle #1Segmentation

3Ease of manufacture

If a bus-based system is used with integrated circuit (ASIC) components, then component integration is improved and costs are reduced, but communication bandwidth is limited

Engineering Contradiction:
Improvecomponent integrationVSAvoidcommunication bandwidth
Core Design Contradiction:
Ease of manufactureVSSpeed

Solution Approach 1:

The traditional parallel bus mechanical connection system is replaced with high-speed serial interfaces that use different communication protocols and physical layer technologies. This substitution enables significantly higher communication bandwidth while maintaining the integrated ASIC architecture, thus resolving the contradiction between ease of manufacture and communication speed.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10248095B2Numerical control device having improved servo control performance
Publication Date: 2019.04.02 FANUC LTD
  • US10248095B2 patent drawing
  • US10248095B2 patent drawing
  • US10248095B2 patent drawing

AI summary

A numerical control device includes a multicore CPU for outputting a position command value of a servomotor, an ASIC including a servo controller, which outputs a current command value to an amplifier for driving the servomotor, and another processor, and a DSP for reading the position command value and controlling the servomotor such that the servomotor moves to a position indicated by the position command value. The CPU and the ASIC are connected through a plurality of serial interfaces.