NC-FET Voltage Amplifier for RRAM Forming at Nominal Voltage
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Solution Overview
Problem
The forming process of resistive random access memory (RRAM) requires high voltage, necessitating charge pumping, which is not feasible at nominal voltage levels.
Innovation Solution
Incorporating a negative-capacitance ferroelectric transistor (NC-FET) as a voltage amplifier to enable the forming process of RRAM at nominal voltage, functioning as a charge pumping circuit to generate an amplified voltage for RRAM operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high voltage is used for the forming process of RRAM, then the forming can be completed successfully, but the operating voltage requirement increases and charge pumping is required
Solution Approach 1:
The patent introduces a charge pump circuit as an intermediary component that generates the high voltage needed for RRAM forming. This charge pump is enabled by a forming enable transistor that is temporarily activated during the forming process. The intermediary charge pump circuit bridges the gap between the nominal operating voltage and the high voltage required for successful forming, allowing the RRAM cell to be formed without permanently increasing the operating voltage requirements.
Solution Approach 2:
The patent employs dynamic control of the forming enable transistor, which is activated only during the forming process and then deactivated. This dynamic approach allows the system to temporarily access high voltage capabilities when needed for forming, while maintaining low operating voltage during normal read/write operations. The forming enable transistor acts as a dynamic switch that transitions the system between different voltage states as needed.
2Reliability
If charge pumping circuit is added to enable high voltage forming, then forming can be achieved, but the device complexity increases
Solution Approach 1:
The forming enable transistor serves multiple functions: it acts as a switch to enable the charge pump during forming, it controls the high voltage application to the selected RRAM cell, and it can be integrated into the existing memory cell array structure. By making this transistor multi-functional, the patent reduces the need for additional dedicated components, thereby limiting the increase in device complexity while still achieving the necessary forming capability.
3Reliability
If individual forming of each RRAM cell is performed, then each cell can be formed properly, but the productivity decreases
Solution Approach 1:
The patent enables simultaneous forming of multiple RRAM cells by applying high voltage to all selected cells at the same time through the charge pump circuit. The forming enable transistor can be activated to perform forming operations on entire rows or columns of the memory array in parallel, rather than sequentially forming individual cells. This continuous parallel operation maintains high formation quality while dramatically improving productivity by forming many cells simultaneously in a single operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables RRAM operation at a nominal voltage, reducing the size of the RRAM array and allowing simultaneous formation of all RRAM cells, thereby overcoming the high voltage requirement of the traditional forming process.
Implementation Method 1
negative-capacitance ferroelectric transistor (NC-FET) as a voltage amplifier to enable the forming process of RRAM at nominal voltage
Implementation Method 2
negative-capacitance ferroelectric transistor (NC-FET)
Data Source
AI summary
A memory device is provided that includes at least one resistive memory cell, a negative capacitance field effect transistor (NC-FET) serving as a voltage amplifier, and a switch enable circuit connecting NC-FET to the memory cell. The NC-FET includes a regular FET having a metal gate terminal and a ferroelectric capacitor. The NC-FET gate terminal forms one plate of the ferroelectric (FE) capacitor. The ferroelectric capacitor includes a ferroelectric dielectric material deposited between a formed upper gate conductive contact and he metal gate terminal. To provide further flexibility, a metal layer can be deposited before the deposition of the ferroelectric material to form a MIM-like FE capacitor so that the capacitance of FE capacitance can be independently tuned by choosing the right height (H), width (W), and length (L) to achieve desired matching between |CFE| and Cox where Cox is the gate oxide capacitance and CFE is the ferroelectric capacitance.