Near-Threshold Cell Delay Modeling for Nonlinear Input Transitions

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Solution Overview

Problem

Current methods for establishing near-threshold cell circuit delay models are time-consuming due to the need for extensive simulations and fail to accurately account for nonlinear relationships between delay and input transition time, as well as non-Gaussian distributions of cell delay, especially in low power consumption scenarios.

Innovation Solution

A near-threshold cell circuit delay model is developed using an equivalent current method and logarithm skewed normal distribution to calculate nominal and statistical delays, considering cell types and input transition times, with specific equations for inverters, stacked, and parallel structure cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a look-up table method is used to establish the near-threshold cell circuit delay model, then the model can predict cell delay in different scenarios, but the time cost is high due to extensive simulations required for establishing the look-up table

Engineering Contradiction:
Improvedelay prediction accuracyVSAvoidsimulation time cost
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the delay characteristics into different components (intrinsic delay, extrinsic delay, overshoot effects) and models each separately using analytical expressions. This segmentation allows the model to achieve high accuracy without requiring exhaustive simulations for all possible scenarios, thereby reducing the time cost while maintaining precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces key parameters such as overshoot time, current ratio, and normalized input transition time to characterize the delay behavior. By changing and analyzing these parameters analytically, the model can predict delay across different scenarios without performing extensive simulations, thus resolving the contradiction between accuracy and time cost.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If a linear model is used to describe the relationship between delay and input transition time, then the model is simple, but it cannot accurately capture the nonlinear change of delay caused by input transition time

Engineering Contradiction:
Improvemodel complexityVSAvoiddelay modeling accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent employs dynamic modeling by introducing the concept of overshoot time and analyzing the transient behavior of the circuit. The model dynamically adjusts the delay calculation based on the relationship between overshoot time and input transition time, accurately capturing nonlinear effects while maintaining reasonable model complexity through structured analytical expressions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent adds temporal dimension analysis by introducing overshoot time as a separate dimension parameter. This allows the model to capture nonlinear delay characteristics by analyzing the circuit behavior in the time domain rather than using simple linear relationships, thereby improving accuracy without excessive complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Measurement precision

If an integral-based modeling method at nominal voltage is used, then the model can provide delay information, but it is not applicable in the near-threshold domain due to the complex current equation

Engineering Contradiction:
Improvedelay modeling capabilityVSAvoidcurrent equation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent uses simplified current models that are valid in the near-threshold domain, replacing the complex integral-based methods. By using approximate but computationally efficient current expressions that capture the essential near-threshold behavior, the model achieves practical delay prediction capability without the computational burden of solving complex integral equations.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

4Ease of manufacture

If a Gaussian distribution-based cell delay model is used, then the model is mathematically convenient, but it is not applicable to near-threshold circuits where the delay follows non-Gaussian distribution

Engineering Contradiction:
Improvemodel implementation easeVSAvoiddelay distribution accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent explicitly accounts for the asymmetric, non-Gaussian nature of delay distribution in near-threshold circuits. By using analytical methods that capture the skewed distribution characteristics through parameters like overshoot time and current ratios, the model achieves accurate delay prediction without relying on the symmetric Gaussian assumption, thereby improving distribution accuracy while maintaining mathematical tractability.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS12511461B2Near-threshold cell circuit delay model
Publication Date: 2025.12.30 SOUTHEAST UNIV
  • US12511461B2 patent drawing
  • US12511461B2 patent drawing

AI summary

Disclosed is a near-threshold cell circuit delay model, where obtaining parameters includes obtaining process parameters, current parameters and delay parameters with slow input transition; judging a cell circuit type includes judging whether a cell circuit is an inverter, a stacked structure cell or a parallel structure cell, calculating currents and a current integral according to the cell circuit type, calculating a mean value, a variance and a skewness of a logarithm of the current sum, and calculating a mean value and a variance of an equivalent threshold voltage; judging a delay type includes calculating an overshoot time and a delay according to the cell circuit type, comparing the magnitude relationship among an input transition time, the overshoot time and the delay, and judging whether the delay type is ultra-fast input, fast input or slow input; establishing a cell circuit nominal delay model is establishing the cell circuit nominal delay model according to the cell circuit type and the delay type, and obtaining a nominal delay value; and establishing a cell circuit statistical delay model is establishing the cell circuit statistical delay model according to the cell circuit type and the delay type.