Viterbi Equalization with Nearest Constellation Stage Reduction

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Solution Overview

Problem

Conventional decoders for convolutionally coded signals face high processing complexity and bit error rates, particularly in noisy channels, due to their dependence on modulation stages and code memory, with Viterbi algorithms being computationally intensive and MMSE-DFE decoders offering lower detection reliability.

Innovation Solution

A modified Viterbi decoding method that employs a symbol reduction device to determine additional information about subsequent states, reducing the number of possible states by subtracting intersymbol interference, thereby lowering processing effort while maintaining high detection accuracy, using techniques like phase modulation and filtering to enhance state determination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If Viterbi algorithm is used to decode convolutionally coded signals, then detection reliability is improved, but processing complexity increases sharply

Engineering Contradiction:
Improvedetection reliabilityVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the set of possible subsequent states into two groups: likely states and unlikely states. The symbol reduction device identifies and eliminates unlikely states before Viterbi decoding, so that only likely states are processed by the Viterbi algorithm. This segmentation reduces the number of state transitions that need to be evaluated, thereby reducing processing complexity while maintaining detection reliability for the most probable paths.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by using the symbol reduction device to determine likely subsequent states before the Viterbi decoding process begins. By pre-identifying and eliminating unlikely states in advance, the system reduces the computational burden on the Viterbi algorithm without compromising the accuracy of the final decoding result.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If MMSE-DFE decoder is used to reduce processing complexity, then processing effort is reduced, but detection reliability deteriorates

Engineering Contradiction:
Improveprocessing complexityVSAvoiddetection reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent merges the advantages of both MMSE-DFE and Viterbi algorithms. It uses the symbol reduction device (which operates similarly to MMSE-DFE by eliminating unlikely states) in combination with the Viterbi algorithm. This hybrid approach combines the low complexity of MMSE-DFE state reduction with the high reliability of Viterbi decoding on the reduced state space, achieving both reduced processing complexity and maintained detection reliability.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If the number of modulation stages is increased, then data transmission capacity is improved, but processing complexity of Viterbi decoder increases sharply

Engineering Contradiction:
Improvedata transmission capacityVSAvoidprocessing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the large state space resulting from high modulation stages into manageable subsets of likely and unlikely states. The symbol reduction device identifies likely subsequent states even when the total number of states is large, allowing the Viterbi algorithm to process only the relevant subset. This enables high data transmission capacity to be maintained while keeping processing complexity manageable.

Inventive Principle:
Principle #1Segmentation

4Reliability

If code memory is increased, then error correction capability is improved, but processing complexity of Viterbi decoder increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses preliminary action by pre-identifying likely subsequent states based on the received symbol and channel conditions before performing full Viterbi decoding. This preliminary state reduction works independently of code memory length, allowing long code memory to be used for improved error correction capability without proportionally increasing processing complexity, since the symbol reduction device handles the initial state filtering.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP2208326B1Viterbi equalization with detection of the nearest constellation points for stage reduction
Publication Date: 2011.03.09 ROHDE & SCHWARZ GMBH & CO KG
  • EP2208326B1 patent drawingFigure 1
  • EP2208326B1 patent drawingFigure 2
  • EP2208326B1 patent drawingFigure 3

AI summary

The invention relates to a device used for the decoding of convolution-coded received symbols (50). Transmission data are modulated into symbols using a modulation schema, said symbols then being encoded to convolution-coded transmission symbols. A convolution-coded transmission symbol comprises portions of a plurality of symbols disposed chronologically one after the other. Said transmission symbols are transmitted via a transmission channel and received as received symbols (50). The Viterbi decoder (81) decodes the received symbols (50) by means of a modified Viterbi algorithm. Before passing through the Viterbi decoder (81), the received symbols (50) are processed by a stage reduction unit (80), which detects additional information in each stage of decoding with regard to possible subsequent stages of decoding, independently of the decoding process by the Viterbi decoder (81). The stage reduction unit (80) uses the additional information to limit the decoding by the Viterbi decoder (81) to certain subsequent stages.