Necked Nanoribbon Channel Structure for Void-Free Workfunction Filling
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Solution Overview
Problem
Conventional semiconductor fabrication processes face challenges in scaling to sub-10 nanometer nodes due to variability and difficulties in workfunction metal deposition on nanoribbon-based transistors with non-uniform thickness, leading to void formation and performance issues.
Innovation Solution
An additional etching process is introduced to neck the nanoribbon channels, reducing the thickness of the ends while maintaining uniformity, resulting in a dumbbell-shaped cross-section that facilitates improved workfunction metal filling and reduces short channel effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication processes are used for nanoribbon-based transistors, then manufacturing simplicity is maintained, but workfunction metal deposition quality deteriorates due to non-uniform thickness causing void formation
Solution Approach 1:
An additional etching process is performed before workfunction metal deposition to pre-shape the nanoribbon channels into a dumbbell configuration. This preliminary action ensures that the subsequent metal deposition occurs on a geometry optimized for uniform filling, preventing void formation while maintaining processability.
Solution Approach 2:
The nanoribbon channels are given different thicknesses at different locations - thinner at the ends and thicker in the middle - creating a dumbbell shape. This local variation in geometry is specifically designed to improve metal deposition quality at the critical end regions where voids typically form.
2Manufacturing precision
If nanoribbon thickness is reduced to improve metal filling, then workfunction metal deposition improves, but short channel effects increase
Solution Approach 1:
The dumbbell-shaped nanoribbon structure implements local quality by having different thicknesses at different positions: the ends are thinner to promote uniform metal filling and prevent voids, while the middle section maintains greater thickness to reduce short channel effects and improve transistor reliability. This spatially differentiated geometry simultaneously addresses both competing requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances workfunction metal deposition, minimizes void formation, and improves transistor performance by ensuring uniform metal coverage and reduced short channel effects.
Implementation Method 1
An additional etching process is introduced to neck the nanoribbon channels, reducing the thickness of the ends
Implementation Method 2
enhances workfunction metal deposition, ensures uniform metal coverage
Data Source
AI summary
Embodiments disclosed herein include transistors and methods of forming transistors. In an embodiment, a transistor comprises a source, a drain, and a pair of spacers between the source and the drain. In an embodiment, a semiconductor channel is between the source and the drain, where the semiconductor channel passes through the pair of spacers. In an embodiment, the semiconductor channel has a first thickness within the pair of spacers and a second thickness between the pair of spacers, where the second thickness is less than the first thickness. In an embodiment, the transistor further comprises a gate stack over the semiconductor channel between the pair of spacers.