Negative-Resistance Oscillator Circuit With Integrated Harmonic Amplification

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Solution Overview

Problem

Existing high-frequency oscillators face challenges in manufacturing high-performance devices due to significant multiplication loss and increased circuit size caused by low power high-frequency components, leading to reduced signal levels and the need for additional amplifiers in frequency multipliers.

Innovation Solution

An electronic circuit device incorporating a negative resistance generating circuit with two transistors in series, where the second transistor receives a DC bias, enhancing nonlinearity and reducing multiplication loss, allowing for efficient multiplication of oscillator output frequencies with a smaller circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a frequency multiplier is used to multiply the output frequency of an oscillator, then the output frequency is multiplied, but the signal level is reduced due to multiplication loss and filter insertion loss

Engineering Contradiction:
Improveoutput frequencyVSAvoidsignal level
Core Design Contradiction:
SpeedVSPower

Solution Approach 1:

The patent combines the frequency multiplication function and amplification function into a single integrated circuit. The output terminal of the frequency multiplier is directly connected to the input terminal of the amplifier, merging two separate functions that were previously implemented as distinct components. This integration maintains the frequency multiplication capability while compensating for signal level reduction through the embedded amplifier.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The integrated circuit performs multiple functions simultaneously: it acts as both a frequency multiplier (generating harmonic frequencies from the input signal) and an amplifier (boosting the signal level). This multi-functional design eliminates the need for separate frequency multiplication and amplification stages, directly addressing the contradiction between frequency multiplication and signal level maintenance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Power

If an amplifier is added after the frequency multiplier to compensate for signal level reduction, then the signal level is maintained, but the circuit size is enlarged

Engineering Contradiction:
Improvesignal levelVSAvoidcircuit size
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

The patent merges the frequency multiplier circuit and amplifier circuit into a single integrated structure on one chip. The output terminal of the frequency multiplier is directly connected to the input terminal of the amplifier within the same integrated circuit device. This consolidation reduces the overall circuit size compared to using separate discrete components while maintaining both frequency multiplication and signal level compensation functions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The amplifier is nested within the frequency multiplier circuit structure. The amplifier circuit is integrated inside the same chip as the frequency multiplier, with the amplifier receiving the multiplied signal directly from the frequency multiplier's output terminal. This nesting arrangement minimizes the overall circuit footprint by placing one functional block within the same physical boundary as another.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Speed

If high frequency waves such as milliwave are used in oscillators, then the operating frequency is increased, but it becomes difficult to manufacture high-performance oscillators

Engineering Contradiction:
Improveoperating frequencyVSAvoidmanufacturability
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The patent replaces mechanical adjustment methods with electrical control mechanisms. The integrated circuit uses electrical biasing and feedback control to stabilize the high-frequency oscillation, eliminating the need for precise mechanical adjustments that are difficult to manufacture and maintain at milliwave frequencies. This substitution enables easier manufacturing while maintaining high operating frequencies.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent employs parameter optimization techniques to improve manufacturability at high frequencies. By carefully selecting and optimizing circuit parameters such as transistor dimensions, bias currents, and passive component values, the design achieves stable high-frequency operation that is more amenable to standard manufacturing processes. The integrated circuit structure allows for parameter optimization that compensates for manufacturing variations.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces multiplication loss and enables the multiplication of high-frequency oscillator outputs with a smaller circuit size, eliminating the need for additional amplifiers and improving the power level of harmonic waves, particularly effective for frequencies above 20 GHz.

Implementation Method 1

a resonator coupled to a control terminal of the first transistor

Methodology Applied
Scientific EffectResonance: Resonance

Data Source

PatentUS7561001B2Electronic oscillator circuit device
Publication Date: 2009.07.14 SUMITOMO ELECTRIC DEVICE INNOVATIONS
  • US7561001B2 patent drawing
  • US7561001B2 patent drawing
  • US7561001B2 patent drawing

AI summary

An electronic circuit device includes a negative resistance generating circuit, a second transistor and a path. The negative resistance generating circuit has a first transistor having a control terminal coupled to a resonator. The second transistor has a control terminal coupled to an output terminal of the first transistor and has an output terminal coupled to a DC bias terminal. The path is coupled to between the DC bias terminal and an output terminal of the first transistor through the second transistor and provides a bias to the first transistor.