Negative Voltage Converter Threshold Independence
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Solution Overview
Problem
Existing negative voltage converters using P-type TFTs suffer from significant output deviations due to variations in threshold voltage caused by different fabrication processes, leading to increased complexity and reduced yield in subsequent circuit operations.
Innovation Solution
A negative voltage converter design that includes multiple transistors and clock signals with specific phase differences and voltage levels, allowing the input voltage to be amplified independently of the threshold voltage of P-type TFTs, ensuring consistent output voltage regardless of fabrication process variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If P-type TFTs are used in negative voltage converter, then the converter can transform positive voltage to negative voltage, but the output voltage deviates significantly due to threshold voltage variations from different fabrication processes
Solution Approach 1:
The patent changes the operating parameters of the P-type TFTs by applying specific clock signal voltage levels (0V and 5V) and timing relationships. By controlling the transistors in specific operating regions through parameter adjustment rather than relying on fixed threshold voltages, the circuit achieves threshold voltage independence and stable negative voltage output despite fabrication process variations.
Solution Approach 2:
The patent employs a feedback mechanism where the output voltage is continuously monitored and the clock signal timing is adjusted accordingly. The cross-coupled transistor configuration creates inherent feedback that compensates for threshold voltage variations, ensuring the output remains stable at the desired negative voltage level regardless of manufacturing precision differences.
2Power
If multiple negative voltage converters are used in a circuit, then the circuit can handle higher power requirements, but the total output voltage deviation accumulates and increases design complexity
Solution Approach 1:
The patent designs a universal negative voltage converter module that can be replicated multiple times in a circuit without requiring individual customization. Each module uses the same threshold voltage independent design, ensuring consistent performance across all instances. This multi-functional approach allows the system to scale power handling capability while maintaining uniform design parameters and reducing overall design complexity.
3Ease of manufacture
If P-type TFTs with different threshold voltages are used, then fabrication flexibility is improved, but the output voltage consistency deteriorates
Solution Approach 1:
The patent converts the harmful effect of threshold voltage variations into a beneficial feature by designing a circuit that is inherently insensitive to threshold voltage differences. The specific clock signal timing and voltage levels are chosen to operate the transistors in regions where threshold voltage variations have minimal impact on output, thereby maintaining output consistency while preserving fabrication process flexibility.
Data Source
AI summary
A negative voltage converter includes six transistors. A first end and a control end of a first transistor are coupled to a signal input. A first end of a second transistor is coupled to the signal input, and a control end of which is coupled to a first clock and the first transistor. A first end of a third transistor is coupled to the signal input, a control end of the third transistor is coupled with a second clock and the second transistor. A first end of a fourth transistor is coupled to the second end of the third transistor, a control end of which is coupled with the first clock and the third transistor. A first end of a fifth transistor is coupled to the second end of the third transistor, and a control end of which is coupled with the second clock and the fourth transistor A first end of a sixth transistor is coupled to the second end of the third transistor, and a control end of which is coupled with the first clock and the fifth transistor.